Low-distortion Audio-range Oscillator

Will ASIO support any sample rate?

ASIO itself dos not defines the sample rate, it's the protocol/API to the HW driver as MME/WDM/WASAPI (MS Windows). The sample rate on the API is usual a 32bit value.

It's the underlying HW, who allows to deal with given/supported sample rates.

Just look on RME: Home or Lynx Studio Technology, Inc. with upper level sound cards & USB based systems.

Usual seen sample rates are may 0.25, 0.5, 1, 2, 4 times of 32/44.1/48 kHz. 8 times the 48Khz = 384Khz is a very rare seen rate.

Hp
 
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ASIO itself dos not defines the sample rate, it's the protocol/API to the HW driver as MME/WDM/WASAPI (MS Windows). The sample rate on the API is usual a 32bit value.

It's the underlying HW, who allows to deal with given/supported sample rates.

Just look on RME: Home or Lynx Studio Technology, Inc. with upper level sound cards & USB based systems.

Usual seen sample rates are may 0.25, 0.5, 1, 2, 4 times of 32/44.1/48 kHz. 8 times the 48Khz = 384Khz is a very rare seen rate.

Hp

Are sample rates between the given multiples possible if the HD supports it?
This is what I'm getting at. If sample rate to 192ksps are supported is a sample rate of 100ksps possible?
 
Are sample rates between the given multiples possible if the HD supports it?
This is what I'm getting at. If sample rate to 192ksps are supported is a sample rate of 100ksps possible?

- Sample rates relates to the on board crystal oscillator and is usual fixed.

- All is Audio related 44.1 & 48kHz, some also support 32kHz, often due the
digital I/O support

- Usual audio sample rates 32, 44.1, 48 and multiple of them are available.
(This what I have seen in the last 20 years,
dealing with my FFT-Analyzer and those HW)

- may some small pitch correction is available, more I haven't seen.
In other words: A custom sample rate as 100Khz no easy way...

As I understand, you would like to have a different sample rate as the standard sample rates provides.... then may alter the on board oscillator but also fake the displayed sample rate (a feature of my SW) ...

Hp
 
- Sample rates relates to the on board crystal oscillator and is usual fixed.

- All is Audio related 44.1 & 48kHz, some also support 32kHz, often due the
digital I/O support

- Usual audio sample rates 32, 44.1, 48 and multiple of them are available.
(This what I have seen in the last 20 years,
dealing with my FFT-Analyzer and those HW)

- may some small pitch correction is available, more I haven't seen.
In other words: A custom sample rate as 100Khz no easy way...

As I understand, you would like to have a different sample rate as the standard sample rates provides.... then may alter the on board oscillator but also fake the displayed sample rate (a feature of my SW) ...

Hp

Hi HpW,

If I use an industrial ADC where I can define the sample rate will an ASIO driver and a program like ARTA handle sample rates other than the standard audio sample rates.
Consider no hardware limitation here.
 
Hi HpW,

If I use an industrial ADC where I can define the sample rate will an ASIO driver and a program like ARTA handle sample rates other than the standard audio sample rates.
Consider no hardware limitation here.

I may write on my own FFT Analyzer & Wave Generator where I support a custom sample rate (any 32bit value) and may not able to speak for ARTA.

First, you have to understand what the HW does/is able, what the related (ASIO-) HW driver does/is able, what the Driver Interface ASIO does/ is able and finally the application (GUI).

In other words the layers as like for ASIO:

1) HW: is designed to support 44.1 & 48 kHz or any other sample rat(s). And only this and no else value.

2) HW Driver: proper implemented, it allows to sample on the supported sample rates as in 1). In other words he will complain on the API with OK or NOK states.

3) Driver Interface: Its a specific API specification who you have to deal with the HW Driver. ASIO / MME & WDM / WASAPI have a complete different implementation!

4) Application: Deals with the Driver Interface (API)

Now, If you would like to render on an unsupported Sample Rate:

1) The application has to support to enter a custom sample rate. Usual a fixed list is provided.

2) If the application supports such custom sample rate, the API Interface do NOT care on the custom sample rate! It just send the value to the HW driver.

3) The HW driver checks the requested sample rate, the API interface result will be OK/NOK and only if the state is OK, it prepares/sets his base frequency according to the requested sample rate. Then the application and API I/O Buffer reservation, channel selection and the following start sample = buffer switching & notification to the application will occur ...

this is all a bit simplified... WASAPI is able to do some sample rate conversions but this is the an other story and for measurement puts the result to hell.

In other words this is the system behavior and not the other way round.

Hopefully, may you get this now ....

Hp
 
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I may write on my own FFT Analyzer & Wave Generator where I support a custom sample rate (any 32bit value) and may not able to speak for ARTA.

First, you have to understand what the HW does/is able, what the related (ASIO-) HW driver does/is able, what the Driver Interface ASIO does/ is able and finally the application (GUI).

In other words the layers as like for ASIO:

1) HW: is designed to support 44.1 & 48 kHz or any other sample rat(s). And only this and no else value.

2) HW Driver: proper implemented, it allows to sample on the supported sample rates as in 1). In other words he will complain on the API with OK or NOK states.

3) Driver Interface: Its a specific API specification who you have to deal with the HW Driver. ASIO / MME & WDM / WASAPI have a complete different implementation!

4) Application: Deals with the Driver Interface (API)

Now, If you would like to render on an unsupported Sample Rate:

1) The application has to support to enter a custom sample rate. Usual a fixed list is provided.

2) If the application supports such custom sample rate, the API Interface do NOT care on the custom sample rate! It just send the value to the HW driver.

3) The HW driver checks the requested sample rate, the API interface result will be OK/NOK and only if the state is OK, it prepares/sets his base frequency according to the requested sample rate. Then the application and API I/O Buffer reservation, channel selection and the following start sample = buffer switching & notification to the application will occur ...

this is all a bit simplified... WASAPI is able to do some sample rate conversions but this is the an other story and for measurement puts the result to hell.

In other words this is the system behavior and not the other way round.

Hopefully, may you get this now ....

Hp

Thanks,

So the answer is no. One would have to write a custom driver, API and app to handle the HD.

Cheers,
 
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I think you can use both the RME and the Lynx with any sample rate up to 218 KHz. You can get SPDIF transmitters that work up to 216 KHz and the ADC's can so if getting measurements past 100 KHz is important combining several available pieces will get you there- Demo board for TI or AKM, Xtal or Synthesizer for the desired clock, RME or Lynx card and HPW software. (now I have removed whatever remaining reason I had not to buy a copy since I have the first three. . .)
 
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An Idea from Matt at QA is the following but he cant do it for a long time -- busy with China customer work -- but thought it would be easy to do -->

How long would it take to add an external trigger I/O port so that up to 16 ADC's could be triggered to sample at same time . and then all imported waveforms into PC and then sycnhronously average those.


Thx-RNMarsh
 
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Joined 2012
An Idea from Matt at QA is the following but he cant do it for a long time -- busy with China customer work -- but thought it would be easy to do -->

How long would it take to add an external trigger I/O port so that up to 16 ADC's could be triggered to sample at same time . and then all imported waveforms into PC and then sycnhronously average those.


Thx-RNMarsh

This is just one way to do it... multiple quad-ADC chips can reduce the size and cost for a custom product. or other lower cost multi-channel ADC makes and models could be modified with trigger I/O port.

-RNM
 
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I finally got around to testing my low distortion oscillator and notch filter. It is based on the design from JanasCard.
Low distortion oscillator tests measurement circuits | TMW

I changed it to 1 kHz instead of 2 kHz. The passive components which determine the frequency have all been mounted in sockets on the first prototype to allow experiments with different values.
All the capacitors in the oscillator circuit and in the notch circuit are 22 nF 1% polystyrene. The notch filter is passive at the moment, but I have prepared the PCB for additional components and jumpers to change it to an active filter.

The result is rather good. I measured the distortion at an oscillator output level of 2.67 Vrms. The second harmonic is at -153 dB and the third harmonic is at -157 dB. The fifth harmonic is around -163 dB. The higher harmonics disappear into the noise floor.
Adding the distortions gives a THD of -151 dB or 0.0000027%. The total distortion of the original design is stated as -148 dB at 2 kHz.

The figure shows the output of the notch filter. 0 dBFS is equal to 200 mVrms. The notch filter has a gain of 40 dB, except for the area around the notch. This drop in the gain has been included in the THD numbers above. The FFT was made with 262144 points and averaged over 10 measurements with a sample frequency of 48 kHz. The level shown for the left channel is not relevant. The signal was measured on the right channel.

I have achieved my goal of making an oscillator, which can be used to check the THD performance of any ADC input without having to worry whether I am testing the ADC or the oscillator. It is a fixed frequency design, so I can only check it at 1 kHz. I might make e.g. a 10 kHz version, but that will probably have to wait, since I have other project ideas I want to pursue before that.
I also need to build the PCB into a metal box to make sure that there will be no hum problems. For the measurement shown I had to shield it a bit to get rid of some 50 Hz and harmonics.
 

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I finally got around to testing my low distortion oscillator and notch filter. It is based on the design from JanasCard.
Low distortion oscillator tests measurement circuits | TMW

I have achieved my goal of making an oscillator, which can be used to check the THD performance of any ADC input without having to worry whether I am testing the ADC or the oscillator. QUOTE]

Excellant performance. That janascard seems to be the real deal. Some had doubt if harmonics actually does go that low.

Is there a pcb available at this time from you or someone else? And, which ADC did you use (modifid?)?


_____________________________________
Here is what can be done just by modifying existing oscillators -- advantage -- multiple freqs, and other functions (measured via analog/dsp analyzers):

4402B thd.JPG KH 4402B

339A.jpg HP-339A tuned into the dirt

AG16B.jpg ShibaSoku AG16B

Thx-RNMarsh
 
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I finally got around to testing my low distortion oscillator and notch filter. It is based on the design from JanasCard.
Low distortion oscillator tests measurement circuits | TMW

I changed it to 1 kHz instead of 2 kHz. The passive components which determine the frequency have all been mounted in sockets on the first prototype to allow experiments with different values.
All the capacitors in the oscillator circuit and in the notch circuit are 22 nF 1% polystyrene. The notch filter is passive at the moment, but I have prepared the PCB for additional components and jumpers to change it to an active filter.

The result is rather good. I measured the distortion at an oscillator output level of 2.67 Vrms. The second harmonic is at -153 dB and the third harmonic is at -157 dB. The fifth harmonic is around -163 dB. The higher harmonics disappear into the noise floor.
Adding the distortions gives a THD of -151 dB or 0.0000027%. The total distortion of the original design is stated as -148 dB at 2 kHz.

The figure shows the output of the notch filter. 0 dBFS is equal to 200 mVrms. The notch filter has a gain of 40 dB, except for the area around the notch. This drop in the gain has been included in the THD numbers above. The FFT was made with 262144 points and averaged over 10 measurements with a sample frequency of 48 kHz. The level shown for the left channel is not relevant. The signal was measured on the right channel.

I have achieved my goal of making an oscillator, which can be used to check the THD performance of any ADC input without having to worry whether I am testing the ADC or the oscillator. It is a fixed frequency design, so I can only check it at 1 kHz. I might make e.g. a 10 kHz version, but that will probably have to wait, since I have other project ideas I want to pursue before that.
I also need to build the PCB into a metal box to make sure that there will be no hum problems. For the measurement shown I had to shield it a bit to get rid of some 50 Hz and harmonics.

I'm not clear about your scale here 0 dBFS is equal to 200 mVrms. Do you mean if you input 200mV into the sound card AudioT reads 0dB?
 
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Having a number of analyzers and generators at hand now, there are different results depending on the residuals from notching the fundemantal, fundamental rejection Q and noise etc. Then, there are the filters with different slopes and different freqs some times.

The analyzer on its side (Panasonic -National- VP-7723A) has different filters than the others.... 100Hz, 200Hz (no 400Hz) and 15KHz, 20KHz, 22KHz and 30KHz, for example. The 15KHz would be used when measuring and tuning FM tuners/multiplex circuits to reject the 19KHz pilot from the THD reading results..

So, when comparing the THD/N or S/Noise numbers, sometimes there are differences in readings which can be quit a few dB apart.

KH4400A.jpg Source: KH4400A

Thx-RNMarsh
 
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The Janus card circuit is not that unique or novel. It appears to be a Wein Bridge variation that uses an LDR for AGC. Thats the nominal description for the ST1700 and very close to the KH4400 as well as Victor's oscillator. What about it allowed the design to have way lower distortion than any of the other options analyzed extensively here?

To exceed the best available ADC's you would need harmonics in the -128 to -130 range (plenty of options) but to measure accurately it would need locking to center the frequency of a "bin".
 
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@davada

I have built an A/D converter board based on the CS5381. The whole board is running off a regulated 5V supply.
One of the channels has a full scale range of 2Vrms, using an LME49721 for the input buffer.
The other channel has a full scale range of 200mVrms, using an OPA1612 for the input buffer/(10x)gain stage. So yes, 200mVrms into the "sound card" (ADC board) gives a 0dB result on the PC.
I used to 200mV input in this case, since it has the lowest noise level and had sufficient headroom to handle the residual output of the notch filter.

@RNMarsh
I do have a few spare PCB's at hand. If you are interested, just let me know.

Here are a couple of pictures of the PCB. The mounted PCB looks a bit untidy, mainly due to the sockets used for the passive leaded components.
The "missing" SMT component at the bottom is the extra op-amp needed to turn the notch filter into an active filter.
The "missing" BNC connector at the top is for an injection-lock option, which I have not tested yet.
 

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