Hello all diyAudio diyers,
I am currently designing an high end DAC with USB and RCA SPDIF input.
I plan to use a CPLD/FPGA between DAIR and DAC chip but I am woring about the jitter and propagation time ...
Is anybody try this approch ?
I am planning to use this as this enable the use of some custom logic for ie L/R channel separation, upsampling and so on ...
All ideas and comments are welcome
Thank you all
I am currently designing an high end DAC with USB and RCA SPDIF input.
I plan to use a CPLD/FPGA between DAIR and DAC chip but I am woring about the jitter and propagation time ...
Is anybody try this approch ?
I am planning to use this as this enable the use of some custom logic for ie L/R channel separation, upsampling and so on ...
All ideas and comments are welcome
Thank you all
What is DAIR ?
You can do plenty of stuff with these chips, but they are quite noisy. I presume you will use some reclocking ?
http://audio.peufeu.com
You can do plenty of stuff with these chips, but they are quite noisy. I presume you will use some reclocking ?
http://audio.peufeu.com
anbello said:
HELL NO !
First, it's a DDL (delay locked loop). While the clock processing units in Xilinx chips are über powerful (ie. you can specify "multiply clock by 27.5/13" or something) the nature of a FPGA means you have a zillion logic gates running at very high speed, hence the output signal noise and ground noise is horrendous.
It is perfect for clocking the inside of the FPGA and other chips, because at 50 MHz noone will notice 1 ns of jitter as long as it meets timing, but if you feed that to a DAC, it will suck.
IMHO, there are two solutions to get a good clock :
- Master clock in the DAC, end of story
- VCXO controlled by a uC (or a FPGA) if you absolutely need clock slave capability
- analog PLL if you had a brain graft from Guido Tent
hi peufeu, thanks for your replay,
i made confusion between Digital Delay Line (DDL) and Delay Locked Loop (DLL), anyway one object it's used in the other.
An implementation of what you say it's the best option (Master clock in the DAC) could be done (as you and alexandre said in other postings) slaving the transport via an s/pdif link. To have low components count the s/pdif rx (for the data to the DAC) and s/pdif tx (for sending back the clock to the transport) could be implemented in FPGA, on opencores.org there are free s/pdif in and out, i2s in and out, FIFO buffer and many other ip cores.
FPGA could be used also for eventual glue logic, oversampling and FIR filtering.
I know you have done a good job with FPGA, i'am trying to do what i said before but i have so little free time.
ciao
andrea
i made confusion between Digital Delay Line (DDL) and Delay Locked Loop (DLL), anyway one object it's used in the other.
An implementation of what you say it's the best option (Master clock in the DAC) could be done (as you and alexandre said in other postings) slaving the transport via an s/pdif link. To have low components count the s/pdif rx (for the data to the DAC) and s/pdif tx (for sending back the clock to the transport) could be implemented in FPGA, on opencores.org there are free s/pdif in and out, i2s in and out, FIFO buffer and many other ip cores.
FPGA could be used also for eventual glue logic, oversampling and FIR filtering.
I know you have done a good job with FPGA, i'am trying to do what i said before but i have so little free time.
ciao
andrea
In retrospect, I behaved a bit like an industrial designer and bought a FPGA that was adequate for the job, but not much more. I shouldn't have done this. I should have gone straight to the massive overkill of power of the Virtex-4 chip.
It would have cost maybe €100 more, but I wouldn't have lost many many hours working around the idiotic, slow, low-throughput design of this FPGA board.
(The Spartan-3 is a very good chip, but it has so little RAM (48kB) and the DRAM chip generously installed by the boardmaker, and the network chip bus are both horrendously slow).
It would have cost maybe €100 more, but I wouldn't have lost many many hours working around the idiotic, slow, low-throughput design of this FPGA board.
(The Spartan-3 is a very good chip, but it has so little RAM (48kB) and the DRAM chip generously installed by the boardmaker, and the network chip bus are both horrendously slow).
Well, I am happy to see that this thread is moving
Peufeu, I am happy to have your opinion as I think you are a good designer, in respect this your job available on Internet about amplifier.
So, what do you think about using a FPGA or a CPLD inside a DAC ? Can it have impact (negative or no impact, may be positive impact) on the final sound of the DAC ?
Peufeu, I am happy to have your opinion as I think you are a good designer, in respect this your job available on Internet about amplifier.
So, what do you think about using a FPGA or a CPLD inside a DAC ? Can it have impact (negative or no impact, may be positive impact) on the final sound of the DAC ?
What I think of a FPGA inside a DAC ? Nothing in particular.
I don't think the fact of having a FPGA as something that has a particular influence on the sound of the gear... it's just a tool that you use to do stuff. Like channel ethernet packets into a DAC, for instance.
A FPGA is like a blank sheet. You can write what you want into it. The question is, what do you want ?
- FIR filtering (like oversampling) ; there's a FIR core in the Xilinx library and also in OpenCores, in that case, count your bytes of RAM and your MAC cores.
- Replace a zillion logic circuits (if it's only that, the smallest FPGA is more than enough)
- FIFOs and stuff
If you want to instantiate a CPU core, beware :
- you need a big FPGA
- you need to put the code somewhere, on chip RAM is scarce and the microblaze has a very NOT compact instruction set !
The best thing you can do is first, decide what you want and then use the free ISE to simulate it.
Oh yeah : high speed logic and stuff = noise. You don't want to do the layout of this 4 layer board and solder BGAs. Buy a module.
rbroer : I don't understand your sentence...
I don't think the fact of having a FPGA as something that has a particular influence on the sound of the gear... it's just a tool that you use to do stuff. Like channel ethernet packets into a DAC, for instance.
A FPGA is like a blank sheet. You can write what you want into it. The question is, what do you want ?
- FIR filtering (like oversampling) ; there's a FIR core in the Xilinx library and also in OpenCores, in that case, count your bytes of RAM and your MAC cores.
- Replace a zillion logic circuits (if it's only that, the smallest FPGA is more than enough)
- FIFOs and stuff
If you want to instantiate a CPU core, beware :
- you need a big FPGA
- you need to put the code somewhere, on chip RAM is scarce and the microblaze has a very NOT compact instruction set !
The best thing you can do is first, decide what you want and then use the free ISE to simulate it.
Oh yeah : high speed logic and stuff = noise. You don't want to do the layout of this 4 layer board and solder BGAs. Buy a module.
rbroer : I don't understand your sentence...
peufeu said:
As there is no rbroer in this thread yet, I'll assume that was for me.
For the price of the smallest V4 device I can have a 4 layer board made with two XC3500E in PQFP208. More conservatively, I'd most likely opt for a pair of easily available XC3S400 in TQ144.
An off-the-dhelf V4 board, otoh, would invariably aimed towards embedded design, telecoms, ASIC replacement even video. In short anything but audio. Contrast that with up to a million gates on a board optimised for audio.
Ah, you got me interested ! (sorry for the identity confusion)
Actually I searched the Net for days looking for FPGA boards suitable for my project, and there is none.
I wanted a board with an Ethernet port, FPGA, and some RAM.
The board I got has a very nice fast Ethernet chip, but it is connected to the FPGA with a horrendously slow 16-bit bus running in asynchronous mode, so you need 3 cycles to pull a 16-bit word out of it, waiting for ARDY signal each time.
The SDRAM is 16 bit too and is very slow. And it shares the same bus as the ethernet chip and the Flash, which means bus multiplexing. The SDRAM controller wants to be connected directly to the chip, so I had to manually place the bus-mux latches in the FPGA to meet timing, or else I would have lost another cycle on RAM access...
Also the Microblaze CPU is all I got, but well, it is not that good, eats a lot of gates, and the code isn't compact at all so it eats a lot of BRAM.
Pretty suboptimal as you see !
Doing active crossover in the FPGA would be a lot more complicated I think, FIR cores are not good for subwoofer crossovers, the impulse responses are too long.
The FPGA is a good place for doing oversampling, though.
Since you say "For the price of the smallest V4 device I can have a 4 layer board made with two XC3500E", let's imagine a FPGA board optimized for use in a multichannel DAC with active crossover in the PC.
Being futureproof is 8 channels at 24-192, this means about 50 megabits so gigabit ethernet is not necessary.
- A good MAC chip like SMC LAN91C113, or maybe using the OpenCores MAC (saves FPGA pins, uses lots of gates).
- USB socket and hardware for JTAG and easy debugging. USB audio streaming is not necessary.
- RAM to buffer the data, but not much, a fast SRAM chip of maybe 256 KB is enough, it will provide 40 ms buffer when running at full throttle. Since this kind of latency is mandatory anyway when playing DVDs for instance, I guess it would be alright.
- A real hard CPU to handle the protocol, with its own Flash and RAM for code. No microblaze !
Suggestions ?
Let's have a deal : you do the board and I'll do all the software, verilog and linux Jack driver.
Actually I searched the Net for days looking for FPGA boards suitable for my project, and there is none.
I wanted a board with an Ethernet port, FPGA, and some RAM.
The board I got has a very nice fast Ethernet chip, but it is connected to the FPGA with a horrendously slow 16-bit bus running in asynchronous mode, so you need 3 cycles to pull a 16-bit word out of it, waiting for ARDY signal each time.
The SDRAM is 16 bit too and is very slow. And it shares the same bus as the ethernet chip and the Flash, which means bus multiplexing. The SDRAM controller wants to be connected directly to the chip, so I had to manually place the bus-mux latches in the FPGA to meet timing, or else I would have lost another cycle on RAM access...
Also the Microblaze CPU is all I got, but well, it is not that good, eats a lot of gates, and the code isn't compact at all so it eats a lot of BRAM.
Pretty suboptimal as you see !
Doing active crossover in the FPGA would be a lot more complicated I think, FIR cores are not good for subwoofer crossovers, the impulse responses are too long.
The FPGA is a good place for doing oversampling, though.
Since you say "For the price of the smallest V4 device I can have a 4 layer board made with two XC3500E", let's imagine a FPGA board optimized for use in a multichannel DAC with active crossover in the PC.
Being futureproof is 8 channels at 24-192, this means about 50 megabits so gigabit ethernet is not necessary.
- A good MAC chip like SMC LAN91C113, or maybe using the OpenCores MAC (saves FPGA pins, uses lots of gates).
- USB socket and hardware for JTAG and easy debugging. USB audio streaming is not necessary.
- RAM to buffer the data, but not much, a fast SRAM chip of maybe 256 KB is enough, it will provide 40 ms buffer when running at full throttle. Since this kind of latency is mandatory anyway when playing DVDs for instance, I guess it would be alright.
- A real hard CPU to handle the protocol, with its own Flash and RAM for code. No microblaze !
Suggestions ?
Let's have a deal : you do the board and I'll do all the software, verilog and linux Jack driver.
Here a list of FPGA board I like. May be this can help :
Xilinx ML403 :
http://www.xilinx.com/xlnx/xebiz/de...details.jsp?key=HW-V4-ML403-USA&iLanguageID=1
and all ML4xx Xilinx board
Altera DE2 :
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=39&No=30
Celoxcia's boards :
www.celoxica.com
Especially the RC340 Expert, my own at home :
http://www.celoxica.com/products/rc340/default.asp
Peufeu, I think as you that FPGA or more precise, FPGA design will not affect the sound in an other way than the design itself, but do you think that propagation time, introduced jitter or somethink else can affect the sound of a DAC ?
To put it in a nutshell, do you preconise or not to use a FPGA in a DAC that is intend to be a high end final product ?
Xilinx ML403 :
http://www.xilinx.com/xlnx/xebiz/de...details.jsp?key=HW-V4-ML403-USA&iLanguageID=1
and all ML4xx Xilinx board
Altera DE2 :
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=39&No=30
Celoxcia's boards :
www.celoxica.com
Especially the RC340 Expert, my own at home :
http://www.celoxica.com/products/rc340/default.asp
Peufeu, I think as you that FPGA or more precise, FPGA design will not affect the sound in an other way than the design itself, but do you think that propagation time, introduced jitter or somethink else can affect the sound of a DAC ?
To put it in a nutshell, do you preconise or not to use a FPGA in a DAC that is intend to be a high end final product ?
I also think the board should be small and not generate lots of EM noise... the boards you link to are quite expensive, besides, and they are huge ! For a DAC ethernet interface you only need a 5x5 cm board maximum, so you can put it inside a shielding box and not pollute your gear... What's the point of not putting your DAC inside a PC if you end up putting a whole PC in your DAC ?
About FPGAs in DACs : I believe stuff that is not needed is unnecessary. (duh !) So, if you want to process straight SPDIF, no FPGA. Or maybe a programmable logic chip to adapt I2S formats...
But if you want to stream audio at high speed from ethernet it's pretty much the only solution... or if you want custom oversampling and don't want a DSP, for instance.
The fact that signals that come out of these big chips are quite full of jitter doesn't matter really, as long as you have a good master clock and proper reclocking...
About FPGAs in DACs : I believe stuff that is not needed is unnecessary. (duh !) So, if you want to process straight SPDIF, no FPGA. Or maybe a programmable logic chip to adapt I2S formats...
But if you want to stream audio at high speed from ethernet it's pretty much the only solution... or if you want custom oversampling and don't want a DSP, for instance.
The fact that signals that come out of these big chips are quite full of jitter doesn't matter really, as long as you have a good master clock and proper reclocking...
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