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Old 7th December 2006, 01:52 PM   #1
cviller is offline cviller  Denmark
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Default Improve jitter-performance with second PLL

Hello

I suspect the signal from my cs8416 is filled with jitter on the "recovered master clock" and perhaps the bit clock is not any better. I was thinking that I could insert a pll with slow tuning before the dac. I guess initial tuning should be rather easy when I already have a reference clock and with slow tuning I mean the feedback should be with a relatively large time-constant. With the new clock I can reclock data signal in a way that I don't throw away any samples.

Should I ignore the recovered master clock and derive a 4*(bit clock) from the bit clock to get a 256*fs signal for my dac chip? Does higher system clocks sound better on TI dac chips?

What do you think - is this even possible?



- Christian
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Old 7th December 2006, 02:53 PM   #2
ojg is offline ojg
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It is indeed possible, and IMO the best implementation of this is here:

http://members.chello.nl/~m.heijlige...%20a%20DAC.htm

OJG
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Old 8th December 2006, 06:35 AM   #3
cviller is offline cviller  Denmark
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Looks interesting - but I need to find a better printer to print those schematics.

Have you build it yourself?
Does it only support 44.1k?
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Old 8th December 2006, 02:04 PM   #4
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Quote:
Originally posted by cviller
Looks interesting - but I need to find a better printer to print those schematics.

Have you build it yourself?
Does it only support 44.1k?
No I haven't built it.
Yes it only supports 44.1, maybe 88.2 but not 48 or 96.

The designer, Guido Tent, is a member of this forum and can surely answer any questions better than I.

OJG
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Old 9th December 2006, 09:21 AM   #5
cviller is offline cviller  Denmark
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I think I'll prefer if the frequency could be tuned to both cd and dvd.

I have tried to simulate different oscillators, but i don't seem to be able to find discrete transistors with enough gain at high frequencies to oscillate in the range 10-50MHz with nice squares. Any suggestions to a VCO I could use?

Will most dac chips enjoy sines as clock signals?

It would be really cool to make the whole PLL circuit with discrete smd's, but I'm afraid it'll act as a transmitter and I might disturb the military frequencies...


No comments about what signal to use for PLL?
Bit-clock or recovered master clock from spdif receiver? I'm thinking that the bit-clock would be the better option.
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Old 9th December 2006, 11:28 AM   #6
Fin is offline Fin
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You could just buy a Tentlabs XO DAC from Guido.
XO DAC
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Old 9th December 2006, 11:49 AM   #7
cviller is offline cviller  Denmark
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But I would rather make something my self. After all this is DIY.
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Old 9th December 2006, 03:48 PM   #8
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Default Re: Improve jitter-performance with second PLL

Quote:
Originally posted by cviller
I was thinking that I could insert a pll with slow tuning before the dac.
I was responding to this................

And installing a pre-assembled module is still diy.............just to a lesser extent......like using an IC instead of discrete components.
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