How would I go about to get a WS(192kHz) when I have a referenceclock of 24.576MHz? /Lovan
Lovan Member Joined 2003 2006-11-15 1:31 am #1 2006-11-15 1:31 am #1 How would I go about to get a WS(192kHz) when I have a referenceclock of 24.576MHz? /Lovan ••• More options Share gmarsh Member Joined 2004 2006-11-15 1:48 am #2 2006-11-15 1:48 am #2 Divide by 128. A 74HC393 should do just fine. ••• More options Share Lovan Member Joined 2003 2006-11-15 1:53 am #3 2006-11-15 1:53 am #3 Hello again gmarsh! I might be tired right now but if I divide by 128 I get Fs(192KHz) in other words, bck right? But how do I get WS(LRCLk,whatever)? /Lovan ••• More options Share Lovan Member Joined 2003 2006-11-15 2:48 am #4 2006-11-15 2:48 am #4 Ignore my last post. Ofcourse, I meant BCK, not WS. BCK should be Fs*2*24=9.216MHz right? that is 24.576*(3/8)? ••• More options Share W Wes Marquenie Member Joined 2003 2006-11-15 10:34 am #5 2006-11-15 10:34 am #5 Why to multiply by 24? I2S only supports 16 or 32 bit data frames ••• More options Share gmarsh Member Joined 2004 2006-11-15 4:23 pm #6 2006-11-15 4:23 pm #6 BCK will be 24.576 / 2. The same HC393 chip used for LRCLK will generate BCK for you. ••• More options Share Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share Show hidden low quality content Status This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button. Share: Facebook Twitter Reddit Pinterest Tumblr WhatsApp Email Share Link Home Source & Line Digital Source Deriving WS from a 24.576MHz clock?
gmarsh Member Joined 2004 2006-11-15 1:48 am #2 2006-11-15 1:48 am #2 Divide by 128. A 74HC393 should do just fine. ••• More options Share Lovan Member Joined 2003 2006-11-15 1:53 am #3 2006-11-15 1:53 am #3 Hello again gmarsh! I might be tired right now but if I divide by 128 I get Fs(192KHz) in other words, bck right? But how do I get WS(LRCLk,whatever)? /Lovan ••• More options Share Lovan Member Joined 2003 2006-11-15 2:48 am #4 2006-11-15 2:48 am #4 Ignore my last post. Ofcourse, I meant BCK, not WS. BCK should be Fs*2*24=9.216MHz right? that is 24.576*(3/8)? ••• More options Share W Wes Marquenie Member Joined 2003 2006-11-15 10:34 am #5 2006-11-15 10:34 am #5 Why to multiply by 24? I2S only supports 16 or 32 bit data frames ••• More options Share gmarsh Member Joined 2004 2006-11-15 4:23 pm #6 2006-11-15 4:23 pm #6 BCK will be 24.576 / 2. The same HC393 chip used for LRCLK will generate BCK for you. ••• More options Share Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share Show hidden low quality content Status This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button. Share: Facebook Twitter Reddit Pinterest Tumblr WhatsApp Email Share Link
Lovan Member Joined 2003 2006-11-15 1:53 am #3 2006-11-15 1:53 am #3 Hello again gmarsh! I might be tired right now but if I divide by 128 I get Fs(192KHz) in other words, bck right? But how do I get WS(LRCLk,whatever)? /Lovan ••• More options Share Lovan Member Joined 2003 2006-11-15 2:48 am #4 2006-11-15 2:48 am #4 Ignore my last post. Ofcourse, I meant BCK, not WS. BCK should be Fs*2*24=9.216MHz right? that is 24.576*(3/8)? ••• More options Share W Wes Marquenie Member Joined 2003 2006-11-15 10:34 am #5 2006-11-15 10:34 am #5 Why to multiply by 24? I2S only supports 16 or 32 bit data frames ••• More options Share gmarsh Member Joined 2004 2006-11-15 4:23 pm #6 2006-11-15 4:23 pm #6 BCK will be 24.576 / 2. The same HC393 chip used for LRCLK will generate BCK for you. ••• More options Share Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share Show hidden low quality content Status This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button. Share: Facebook Twitter Reddit Pinterest Tumblr WhatsApp Email Share Link
Hello again gmarsh! I might be tired right now but if I divide by 128 I get Fs(192KHz) in other words, bck right? But how do I get WS(LRCLk,whatever)? /Lovan
Lovan Member Joined 2003 2006-11-15 2:48 am #4 2006-11-15 2:48 am #4 Ignore my last post. Ofcourse, I meant BCK, not WS. BCK should be Fs*2*24=9.216MHz right? that is 24.576*(3/8)? ••• More options Share W Wes Marquenie Member Joined 2003 2006-11-15 10:34 am #5 2006-11-15 10:34 am #5 Why to multiply by 24? I2S only supports 16 or 32 bit data frames ••• More options Share gmarsh Member Joined 2004 2006-11-15 4:23 pm #6 2006-11-15 4:23 pm #6 BCK will be 24.576 / 2. The same HC393 chip used for LRCLK will generate BCK for you. ••• More options Share Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share Show hidden low quality content Status This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button. Share: Facebook Twitter Reddit Pinterest Tumblr WhatsApp Email Share Link
Ignore my last post. Ofcourse, I meant BCK, not WS. BCK should be Fs*2*24=9.216MHz right? that is 24.576*(3/8)?
W Wes Marquenie Member Joined 2003 2006-11-15 10:34 am #5 2006-11-15 10:34 am #5 Why to multiply by 24? I2S only supports 16 or 32 bit data frames ••• More options Share gmarsh Member Joined 2004 2006-11-15 4:23 pm #6 2006-11-15 4:23 pm #6 BCK will be 24.576 / 2. The same HC393 chip used for LRCLK will generate BCK for you. ••• More options Share Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share Show hidden low quality content Status This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button. Share: Facebook Twitter Reddit Pinterest Tumblr WhatsApp Email Share Link
gmarsh Member Joined 2004 2006-11-15 4:23 pm #6 2006-11-15 4:23 pm #6 BCK will be 24.576 / 2. The same HC393 chip used for LRCLK will generate BCK for you. ••• More options Share Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share Show hidden low quality content Status This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Lovan Member Joined 2003 2006-11-15 4:44 pm #7 2006-11-15 4:44 pm #7 Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again ••• More options Share
Thank you Gmarsh. I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again