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Deriving WS from a 24.576MHz clock?
Deriving WS from a 24.576MHz clock?
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Old 15th November 2006, 12:31 AM   #1
Lovan is offline Lovan  Sweden
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Default Deriving WS from a 24.576MHz clock?

How would I go about to get a WS(192kHz) when I have a referenceclock of 24.576MHz?

/Lovan
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Old 15th November 2006, 12:48 AM   #2
gmarsh is offline gmarsh  Canada
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Divide by 128.

A 74HC393 should do just fine.
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Old 15th November 2006, 12:53 AM   #3
Lovan is offline Lovan  Sweden
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Hello again gmarsh!

I might be tired right now but if I divide by 128 I get Fs(192KHz) in other words, bck right?
But how do I get WS(LRCLk,whatever)?

/Lovan
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Old 15th November 2006, 01:48 AM   #4
Lovan is offline Lovan  Sweden
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Ignore my last post.

Ofcourse, I meant BCK, not WS.
BCK should be Fs*2*24=9.216MHz right?
that is 24.576*(3/8)?
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Old 15th November 2006, 09:34 AM   #5
Wes Marquenie is offline Wes Marquenie  Netherlands
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Why to multiply by 24? I2S only supports 16 or 32 bit data frames
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Old 15th November 2006, 03:23 PM   #6
gmarsh is offline gmarsh  Canada
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BCK will be 24.576 / 2.

The same HC393 chip used for LRCLK will generate BCK for you.
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Old 15th November 2006, 03:44 PM   #7
Lovan is offline Lovan  Sweden
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Thank you Gmarsh.
I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again
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