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Old 24th August 2006, 03:50 PM   #1
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Default S/PDIF Jitter: Myth or Reality?

Many here are willing to accept the guaranteed jitter created by asynchronous reclocking rather than suffer the horror of S/PDIF jitter. That’s their choice; but it is a choice based on myth, superstition, and ignorance.

Here are some spectral plots of two different DACs. Both are feed by the same PC-generated S/PDIF signal. If S/PDIF jitter were so pervasive one would expect to see its manifestations in all DACs connected to it but that’s clearly not the case. In the plots below, J-Test refers to Julian Dunn’s jitter test signal, which is supposed to be especially sensitive to data-correlated jitter, the kind of jitter S/PDIF is supposed to have. All test tones were created with DACtester v0.8d.

DAC “A” is everyone’s favorite, eight TDA1543s in parallel. This DAC is described as sounding most “analog-like.” I guess to someone whose only exposure to analog music reproduction is a thrift store turntable and a “little rat” phono stage. Why are DACs always compared to some unspecified “analog-like” sound? What’s wrong with using live acoustic music as a reference? I know, you have to dumb-down the reference otherwise digital audio will never measure-up.

DAC “B” is a mystery DAC.

First, here is DAC “A” with its “analog-like” sound dealing with J-Test. Oh, the horror. Look at those nasty sidebands created by the S/PDIF-induced data jitter.

Here is DAC “B” with the very same J-Test signal played through the very same S/PDIF connection: Only the DAC was changed. Why, how can that be? I thought S/PDIF was so horrible that anything would be preferable.

Second, here is DAC “A” trying to produce a clean 11KHz sine wave. Tell me, if a DAC can’t reproduce a clean, single-frequency sine wave how can it accurately reproduce more complex music?

Here is DAC “B” with the very same sine wave played through the very same S/PDIF connection: Again, only the DAC was changed.

Third, here is DAC “A” with a 1KHz sine wave.

Here is DAC “B” with the very same sine wave played through the very same S/PDIF connection: Again, only the DAC was changed.

Do you notice a pattern? The problem is not S/PDIF, but the implementation of particular S/PDIF receivers.

Note: No snake oil or audio voodoo was used in this comparison.
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Old 24th August 2006, 04:31 PM   #2
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Are you trying to say that they both have CS8412/14 but implemented differently ( loop filter, input stage etc. ) ?
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Old 24th August 2006, 04:39 PM   #3
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OK, I can see a difference in the traces. But what am I looking at? What is the vertical and horizontal scaling?

S/PDIF distorts the eye pattern when carried over a real piece of cable because of its violation of Manchester coding to mark the beginning of a word. If you recover your clock just before that violation occurs, you have a much better chance of rejecting jitter. You appear to be demonstrating a better clock recovery scheme. Yes?

As for 1543 being everyone's favourite, count me out. It's flawed.
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Old 24th August 2006, 04:49 PM   #4
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I think Ulas is hinting:

1. No reclocking
2. Buffering/conditioning spdif before receiver.Also mck coming out.

3.Power supply.

Ulas what is your mystery dac?
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Old 24th August 2006, 05:08 PM   #5
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Can you do these tests for a pcm270x usb dac?
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Old 24th August 2006, 05:25 PM   #6
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My favorite DACs are AD1955 and AD1853. Why do you think that TDA1543 is everyone's favorite???
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Old 24th August 2006, 07:38 PM   #7
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Default Re: S/PDIF Jitter: Myth or Reality?

Quote:
Originally posted by Ulas
The problem is not S/PDIF, but the implementation of particular S/PDIF receivers.

very old news, Mr Ulas, there is a decent implementation published on my website:

http://www.tentlabs.com/Products/DIYDAC/DIYDAC.html

and specifically

http://members.chello.nl/~m.heijlige...ml/dig_r2a.pdf (input receiver)

http://members.chello.nl/~m.heijlige...ml/dig_r2c.pdf (secondary PLL)

Once the receiver side is optimised, the transmitter can be improved (low jitter clock, SPDIF reclocking and decent buffering with Zout=75 ohm), and these improvements can still be heard (and measured).

Given the amount of effort one has to put into optimising an SPDIF chain, I'd be more happy with another interface, maybe a bit more expensive but much less hassle compared to getting things right using SPDIF.
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Old 24th August 2006, 07:44 PM   #8
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I guess that non-oversampling TDA1543 DAC circuit was tested, with almost no output filtering. No wonder that spectral analysis of analog output is full of noise. Every "standard" oversampling DAC with digital and analog filter will perform better in this test than the non-oversampling non-filtered one.
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Old 25th August 2006, 06:46 AM   #9
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Default Re: Re: S/PDIF Jitter: Myth or Reality?

Quote:
Originally posted by Guido Tent
Once the receiver side is optimised, the transmitter can be improved (low jitter clock, SPDIF reclocking and decent buffering with Zout=75 ohm), and these improvements can still be heard (and measured).

Given the amount of effort one has to put into optimising an SPDIF chain, I'd be more happy with another interface, maybe a bit more expensive but much less hassle compared to getting things right using SPDIF.
I really appreciate the work you've done on said DAC, however it hasn't solved the problem completely. PLL cannot achieve complete independence on the input signal and hence different approach shall be used and I bet you will no longer be able to tell any difference.. it's on the complex side, but it's achievable.. I'd be also happy to have different interface, but unless it's bidirectional and electrically isolated it wouldn't solve the jitter problem completely either.. the world gave us S/PDIF and we have to deal with it as best as we can..
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Old 25th August 2006, 11:43 AM   #10
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Default Re: Re: Re: S/PDIF Jitter: Myth or Reality?

Quote:
Originally posted by Glassman

I really appreciate the work you've done on said DAC, however it hasn't solved the problem completely. PLL cannot achieve complete independence on the input signal and hence different approach shall be used and I bet you will no longer be able to tell any difference.. it's on the complex side, but it's achievable.. I'd be also happy to have different interface, but unless it's bidirectional and electrically isolated it wouldn't solve the jitter problem completely either.. the world gave us S/PDIF and we have to deal with it as best as we can..
well, that is more or less what I wrote......

The PLL driving a VCXO in the CD transport, and a fixed oscillator in the DAC, is a next step to expand SPDIF (the control voltage for the VCXO is the extra wire) but still the transport quality (in terms of jitter) counts.

After all I prefer a one box solution

best
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