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#1 |
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Banned
Join Date: Mar 2003
Location: .
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This diagram shows another way to get 8x linear interpolation with NOS DACs. All timing is derived from a synchronous counter clocked either by a local oscillator or S/PDIF. The oscillator also exports a clock to slave the CDP.
CLK0-3 are quadrature clocks. WS0-7 are 8-phase strobes. Everything else should be obvious. The circuit can be implemented with as few as 14 logic ICs (74xx type), 8 stereo DACs, a S/PDIF receiver, and transceivers to slave the CDP. Use the local oscillator in conjunction with a slaved CDP. Use the S/PDIF clock source with non-slaved CDPs. Or, use the local oscillator with a non-slaved CDP if you prefer the sound of missing/duplicated samples, as do users of the DDDAC. If you like the sound of jitter, add a USB receiver but be sure to aschronously reclock BCLK for maximum the effect. The choice is yours. |
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#2 |
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diyAudio Member
Join Date: Nov 2005
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linear interpolation? again?
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#3 | |
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diyAudio Member
Join Date: Jan 2002
Location: Cheltenham
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#4 | |
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Banned
Join Date: Mar 2003
Location: .
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#5 | |
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diyAudio Member
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DDDAC users collectively think this dac sounds great (read my site, don't believe me, just read what others say ....) So if reproduced music sound great, even when you loos or duplicate a few samples, who cares? Ulas does, but he is not listening to music, so his opinion is only of technical value. He is mostly right, but missing the point what makes really a difference in musical experience. If every one prefer blond, Ulas will tell you, for good reasons I guess, that brown is better for practical reasons, but who wants that ? doede
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#6 | ||
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diyAudio Member
Join Date: Oct 2003
Location: osorno , Chile
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Hey! ...I too prefer brown! ![]() Quote:
Cheers M
__________________
"Thou shall build big horn speakers" |
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#7 | |
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Banned
Join Date: Mar 2003
Location: .
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Quote:
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#8 |
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diyAudio Member
Join Date: Nov 2005
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Ulas,
When you say "non-slaved CDP", do you mean that the CDP is "free-running"? That reclocking has gone to point of dropping (or plugging) samples to accomodate 2 different clocks? What am I missing here?
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#9 |
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diyAudio Member
Join Date: Oct 2001
Location: .
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Common practice is to run the CS8412 in master mode. That way all clocks are synchronous with the clock derived from the SPDIF datastream.
The DDDAC runs the CS8412 in slave mode. In that mode one is required to generate FSYNC/WS/LRCLK and BCLK/SCLK. These are then used to clock data out of the CS8412. In the pro arena these clocks would be derived from a VCXO locked to a common reference as would the CDP so there would synchronicity across the board. Alternatively one can derive the clocks from an XO and in turn run the CDP off a feed from the same XO. Again there is synchronicity across the board. Now DDDAC opts for neither of the above options, sticking solely with the XO. Needless to say any frequency other than that for which the XO was chosen is out. Even when the frequencies match one has to hope that the phase discrepancy between the incoming SPDIF datastream and the onboard XO are not enough to overwhelm any buffering the CS8412 may provide otherwise there will be dropped or repeated samples. |
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#10 |
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diyAudio Member
Join Date: Nov 2005
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That is nuts... if I understand you correctly.
It would seem to me that dropping or repeating samples would be the most horrible form of jitter. This is nuttier than the linear oversampling thread.
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