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Old 13th July 2006, 04:59 PM   #1
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Question Wordclock Schematic?

Hi,

I want to DIY a wordclock generator for my EQ & DAC. Where I can find the shematic?

Thanks
Gary.
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Old 13th July 2006, 11:30 PM   #2
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It is just a rock steady 44k1/48k/96k/192k squarewave.
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Old 14th July 2006, 02:50 PM   #3
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Try the Symetrix site. They used to have and may still have the schematics of their discontinued equipment. As they used to make an A/D converter there is a good chance they also made a clock generator.
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Old 15th July 2006, 08:26 PM   #4
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Quote:
Originally posted by rfbrw
It is just a rock steady 44k1/48k/96k/192k squarewave.

exactly

start with a decent clock, divide down using hc393 logic and reclock the divided signal again with the original clock, using HC74 flipflop.

best
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Old 15th July 2006, 11:07 PM   #5
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Quote:
Originally posted by Guido Tent
start with a decent clock, divide down using hc393 logic and reclock the divided signal again with the original clock, using HC74 flipflop.
More bad advice from a clockmonger. The HC393 is a ripple counter, just like the HC4040. As such, it is clocked on the falling edge. The HC74 is clocked on the rising edge. That means, if the propagation delay through the HC393 is close to half the clock period, the input to the HC74 will not meet the setup time and the output will be unpredictable. That’s not desirable for a clock.

For example, suppose you start with a 5.6448MHz clock and divide it by 128 to make a 44.1KHz word clock.
It takes 7 stages to divide by 128 and the expected propagation delay is 60-106ns. Unfortunately, the HC74 will be clocked 88ns later which just about guarantees bad data. GIGO.

The HC393/HC74 is also a bad choice because the divisor must be a power of two. How do you get 44.1KHz from 16.9344MHz?

The right way to divide a clock is with a synchronous counter. All outputs change simultaneously on the rising edge of the clock and counters can be arranged to divide by any number, not just powers of two.
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Old 16th July 2006, 06:28 AM   #6
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Quote:
Originally posted by Ulas


More bad advice from a clockmonger. The HC393 is a ripple counter, just like the HC4040. As such, it is clocked on the falling edge. The HC74 is clocked on the rising edge. That means, if the propagation delay through the HC393 is close to half the clock period, the input to the HC74 will not meet the setup time and the output will be unpredictable. That’s not desirable for a clock.

For example, suppose you start with a 5.6448MHz clock and divide it by 128 to make a 44.1KHz word clock.
It takes 7 stages to divide by 128 and the expected propagation delay is 60-106ns. Unfortunately, the HC74 will be clocked 88ns later which just about guarantees bad data. GIGO.

The HC393/HC74 is also a bad choice because the divisor must be a power of two. How do you get 44.1KHz from 16.9344MHz?

The right way to divide a clock is with a synchronous counter. All outputs change simultaneously on the rising edge of the clock and counters can be arranged to divide by any number, not just powers of two.

Mr Ulas,

I see you are still active on the forum. There is a bunch of people waiting for your answer on another digital thread:

http://www.diyaudio.com/forums/showt...263#post956263

It seems you are very good at finding problems that do not exist. Ofcourse I check for timing issues, and for the sake of simplicity I start with the lowest available clock frequency, e.g. 64*fs, which is, ofcourse, a power of two.

In case you wan to continue arguing, I've built many many wordclock configurations, and they all work, including the suggestion I did to a fellow member asking for advise.
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Old 17th July 2006, 04:41 PM   #7
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Quote:
Originally posted by Guido Tent
There is a bunch of people waiting for your answer on another digital thread:
What question is that? I doubt anyone here really wants to hear from me, not after the diyAudio Experts, including you, Mr. Tent, have declared that I don't know what I'm talking about.

Beside, isn’t this forum all about Doing It Yourself? There’s another acronym that goes along with DIY and that’s RTSL. It means: Read, Think, Study, Learn. Of course, many here choose not to make the effort and would rather be spoon-fed by the diyAudio Experts. They probably get what they deserve because most of the diyAudio Experts are here to sell stuff and the advice they give is just to pump-up their credibility as “experts.” I'll just continue to shoot down the diyAudio Experts when they give bad advice or make outlandish claims.

Quote:
Originally posted by Guido Tent
It seems you are very good at finding problems that do not exist.
Isn’t that what good engineering is about: Identifying potential problems and avoiding them with sound design?

Quote:
Originally posted by Guido Tent
Ofcourse I check for timing issues, and for the sake of simplicity I start with the lowest available clock frequency, e.g. 64*fs, which is, ofcourse, a power of two.
Your advice was:

“start with a decent clock, divide down using hc393 logic and reclock the divided signal again with the original clock, using HC74 flipflop.”

The implication in your advice was: ”Start with any decent clock.” I was just pointing out that your advice, as given, was very bad and I explained why.
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Old 17th July 2006, 05:09 PM   #8
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Quote:
Originally posted by Ulas


What question is that? I doubt anyone here really wants to hear from me, not after the diyAudio Experts, including you, Mr. Tent, have declared that I don't know what I'm talking about.

Beside, isn’t this forum all about Doing It Yourself? There’s another acronym that goes along with DIY and that’s RTSL. It means: Read, Think, Study, Learn. Of course, many here choose not to make the effort and would rather be spoon-fed by the diyAudio Experts. They probably get what they deserve because most of the diyAudio Experts are here to sell stuff and the advice they give is just to pump-up their credibility as “experts.” I'll just continue to shoot down the diyAudio Experts when they give bad advice or make outlandish claims.

Isn’t that what good engineering is about: Identifying potential problems and avoiding them with sound design?

Your advice was:

“start with a decent clock, divide down using hc393 logic and reclock the divided signal again with the original clock, using HC74 flipflop.”

The implication in your advice was: ”Start with any decent clock.” I was just pointing out that your advice, as given, was very bad and I explained why.
Other thread: No answer, anyone can read and conclude.

You now try to avoid the technical discussion. My advise wasn't bad, you try to make it that way by (again) including non existring problems. Again, I built and sold many wordclocks based on my first answer, they all still work - nuf said.
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Old 18th July 2006, 02:08 PM   #9
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Quote:
Originally posted by Guido Tent
Other thread: No answer, anyone can read and conclude.

You now try to avoid the technical discussion.
Again I ask, what is the question? The post you linked to has rfbrw wanting me to describe the HexideciDAC. He is just baiting me because he already knows about the project since he posted a link to its description in the other forum.

The prior post was your attempt to justify the bad decisions made in Tube DAC design. As for your feigned interest in my preferred clocking scheme, what can I say? Anyone who reads that thread with an open mind will see that for every critique I offered a solution. Your mind is obviously not open because: you are the great Guido Tent, clockmonger extraordinaire, you work for Philips, you know everything there is to know about clocks, clocked circuits, and digital audio and those who disagree with you don’t know what they are talking about.
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Old 18th July 2006, 02:27 PM   #10
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Quote:
Originally posted by Ulas


Again I ask, what is the question? The post you linked to has rfbrw wanting me to describe the HexideciDAC. He is just baiting me because he already knows about the project since he posted a link to its description in the other forum.

The prior post was your attempt to justify the bad decisions made in Tube DAC design. As for your feigned interest in my preferred clocking scheme, what can I say? Anyone who reads that thread with an open mind will see that for every critique I offered a solution. Your mind is obviously not open because: you are the great Guido Tent, clockmonger extraordinaire, you work for Philips, you know everything there is to know about clocks, clocked circuits, and digital audio and those who disagree with you don’t know what they are talking about.
I explained a lot about the background of the DAC design. You may call it bad, or whatever you like to call it, I am OK with any of your descriptions, but since hundreds have been build I trust my customers the DAC is OK (at least for the money).

The question was about how would you distribute clocks, or even more interesting, to share your favourite DAC design.

I am open to any critic, as long as it has some fundamental basis rather than you somming up problems that don't exist let alone issues I never came up with.

If you have comments I'd like to see some proof by measurement for example, both from the bad and the good design. Let us start with the clock distribution, I invite you to prove how bad an HC04 inverter is a as a clock buffer. Afterwards you come up with a proposal to improve matters, so we all learn.

I don't work for Philips anymore, I am fully self-employed now.

I never claimed to know everything from digital design (your words), I only know that the circuits and products I bring to the market (or share) are proven, work well and are appreciated by customers.
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