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Old 24th March 2006, 06:59 AM   #1
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Default SPDIF from DAC Input Streams

How do I derive an spdif output from the dac input streams LRCK SDATA and MCLK? Any circuits or url will help.

Example is AK4351VT chip in a satellite receiver.

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Old 24th March 2006, 08:23 AM   #2
A 8 is offline A 8  Sweden
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Default A DIT should do it.

Digital interface transmitter.

CS has a 8404 something and you can probably find many others who manufactures these types of chips.
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Old 24th March 2006, 09:40 AM   #3
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First you want this, http://www.asahi-kasei.co.jp/akm/en/...4351_f04e.pdf. From that you can determine the format of the data and the rate of MCLK.
Having done that you can then choose your SPDIF transmitter.
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Old 24th March 2006, 03:33 PM   #4
gmarsh is offline gmarsh  Canada
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Do you have a 256*FS or 512*FS clock available?
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Old 24th March 2006, 04:40 PM   #5
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http://www.asahi-kasei.co.jp/akm/en/...51/ak4351.html

256Fs or 384Fs only
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Old 24th March 2006, 09:47 PM   #6
gmarsh is offline gmarsh  Canada
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Quote:
Originally posted by rfbrw
http://www.asahi-kasei.co.jp/akm/en/...51/ak4351.html

256Fs or 384Fs only
Looking at other manufacturers, the Cirrus CS8406 does 128/256/384/512, and the TI DIT4096/DIT4192 do 256/384/512.

I've never seen 384Fs in any audio equipment I've ever worked on, so I keep forgetting that it exists
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Old 24th March 2006, 11:48 PM   #7
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With one exception everything CD-related I have is either 384Fs or some other multiple of 3Fs.
The CS8406 is a bit of a nuisance in that it needs a uc for 384Fs.
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Old 25th March 2006, 08:09 AM   #8
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Quote:
Originally posted by rfbrw
First you want this, http://www.asahi-kasei.co.jp/akm/en/...4351_f04e.pdf. From that you can determine the format of the data and the rate of MCLK.
Having done that you can then choose your SPDIF transmitter.
---------------------------------------------------------------------------------
Thanks, I shall need to measure MCLK data rate.

My problem is that I am new at this, and looking at the input streams available, and the transmitter inputs, I am unable to match inputs with outputs. If I want to use the CS8404 for example, and assuming that I have the correct MCLK rate, how ares the connections made?

Some pointers to info will be appreciated.
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Old 25th March 2006, 12:52 PM   #9
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What is the state of DIF0,DIF1 and CKS ?
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Old 25th March 2006, 02:38 PM   #10
A 8 is offline A 8  Sweden
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Not sure what it is you need but....perhaps this will help.

The Cirrus device has FSYNC which is word clock, SCK which is bitclock and sdata which is data according to more common terminology.

As far as I remember its all in the datasheet.
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