How master clock oscillators work

[EC8010]

I wrote this about five years ago but it still seems to be valid. Sorry about the formatting but WordPerfect doesn't translate easily to Micky$oft.



Low jitter master clocks for digital audio

Background:

By Shannon's information theory, an Analogue to Digital Convertor (ADC) converts information from the voltage domain to the time domain, whereas a Digital to Analogue Convertor (DAC) does the inverse. In the final analysis, all DACs drive charge into a capacitor. This process may be clearly visible, as in a 1-bit DAC followed by a single capacitor filter, or it may be concealed, such as in a multibit DAC followed by a complex LC reconstruction filter.

The voltage across a capacitor is proportional to its charge, and if charging current is constant, then capacitor voltage is proportional to charging time. The DAC capacitor charges for the period of the sample clock, so if sample clock time changes, capacitor voltage changes proportionately. Thus clock jitter is converted into amplitude distortion in accordance with Shannon, and the requirement for a low jitter sample clock has been established.

Requirements for sustained oscillation:

To produce sustained oscillations (whether mechanical, or electrical) we need the following:

Frequency selective mechanism: This could be a combination of an inductor and a capacitor, or the balance wheel and spring in a "clockwork" clock, or a transducer with a mechanical resonance such as a quartz crystal.

Energy input: The frequency selective mechanism always has losses, and must receive energy to compensate for these losses and maintain oscillation.

The balance between energy input and losses is crucial. If less energy is received than is lost, then oscillation amplitude gradually decays until it stops. If too much energy is received, oscillation amplitude builds up without limit. In the practical world, infinite oscillation amplitude is not possible, and is limited by power supply rails in an electrical circuit, or by mechanical stops in a clock.

Mechanical considerations:

The master clock in a digital system is invariably a quartz crystal, which is a mechanical resonator combined with a transducer.

The simplest mechanical resonance relies on Hooke's Law providing a restoring force to the mass suspended by the spring, and resonant frequency is determined by:

f=1/[2 x sqrt [mC]]

Where:

m = suspended mass
C = compliance of spring

It can be seen that resonant frequency is determined by spring compliance, but practical springs do not behave with the linearity implied by Hooke's Law, and have compliance that changes with amplitude, implying variable resonant frequency. A quartz crystal is a more complex resonator, but it still suffers from the preceding limitations.

Although crystal losses are very low, they are not zero, so additional energy must be supplied from an external source to compensate for these losses and maintain oscillation. The amount of additional energy supplied each cycle determines oscillation amplitude, and an ideal control circuit would maintain constant oscillation amplitude at all times. However, if oscillation amplitude gently changes with time, then the peak deflection of the crystal spring must change, and resonant frequency may change. Considered in the time axis, this is jitter...

In order to optimise the mechanical oscillation of the crystal, and thereby minimise jitter, the physical oscillation amplitude of the crystal should be constant.

Distortion is a second order effect arising from spring non-linearity. For any spring, the smaller the deflection, the better the approximation to Hooke's Law. Therefore, to minimise distortion arising from imperfect amplitude stabilisation, the voltage across the crystal should be low.

Crystals frequently have spurious responses at -20dB a few 100kHz away from their main resonance. Better crystals minimize these spuriae, alternatively, a ½ section lattice filter can be used (looks like a transformer feeding a centre tapped rectifier, but uses crystals instead of diodes).

Circuit considerations:

Although oscillators may produce either sine or square waves, any oscillator may be considered to be a sinusoidal oscillator enclosed by an amplitude stabilisation circuit of variable efficacy. Methods of amplitude stabilisation are tabled below:


Amplitude stabilisation method/example/comments:

Supply rail limiting: CMOS invertor, crude; far too much stress applied to crystal

Vbe or diode limiting: Single transistor RF oscillator, can be good, but relies on high Q of crystal

Variable gain amplifier plus side chain: Rarely seen (1) Has potential to be the best, but is complex

Thermistor: AF Wien bridge, not practical at RF


The simplest (and arguably the best) method of amplitude stabilisation is the thermistor. In combination with a Wien bridge, this produces low distortion sine waves, despite the fact that the Q of the Wien bridge is low (Q = 3). In other words, any method of producing low distortion sine waves (that does not rely on a high-Q filter) requires an excellent amplitude stabilisation system. Looking at the opposite extreme, it is alarming to find that the most common master clock in many domestic CD players is based on a CMOS invertor. This oscillator has extremely crude amplitude stabilisation, and applies high voltages to the crystal, but works because Q for a crystal is high (Q = 18,000) (2). It is no wonder that almost any modification improves this circuit!

The ideal master clock for a digital system would combine the high Q of the crystal with a good amplitude stabilisation system to produce a sine wave. The crystal would be driven from a low impedance source in order to maximise its Q, and there would be a low voltage across the crystal to minimise deflection non-linearities within the crystal. The low distortion/jitter sinusoidal crystal oscillator would be followed by a buffer to isolate it from the comparator needed to provide the square wave clock required by the digital circuitry.

Comparator problems:

A comparator may be considered to be a 1-bit ADC, and as such, it converts amplitude variations into time variations. In order to switch the comparator as sharply as possible and minimise this problem, it is conventional to sample the sine wave at the zero crossing point where dV/dt is at a maximum. Even so, if the amplitude of the sine wave changes, then dV/dt at the zero crossing also changes, and because practical comparators require a finite input voltage to change the output state, this changes the time at which the comparator switches.

Poor amplitude stabilisation of the sine wave oscillator not only causes jitter within the oscillator, but also at the conversion from a sine wave to a square wave.

Dedicated comparators draw high input current transients as they switch, because one transistor is being switched off and another is switched on (3), so the oscillator must be buffered from the comparator, and the buffer must be capable of sourcing these pulses without disturbing the crystal oscillator.

References:

(1). BBC "EP14/1 AC test set manual" Jan 1975
(2). IQD "Crystal Product Data Book 1994" P248
(3). Analog Devices "Ultrafast TTL comparators AD9696/AD9698" 1991

[hagtech]

all DACs drive charge into a capacitor

This is not true. Typically they output current, not charge. Often this current is converted to voltage internally via a transimpedance amplifier. The charge thing might be valid for sigma-delta types.

The voltage across a capacitor is proportional to its charge

Sort of misleading. I = Q/T. I = C*V/T.

but practical springs do not behave with the linearity implied by Hooke's Law

Correct, their force is proportional to the square of the displacement.

A quartz crystal is a more complex resonator, but it still suffers from the preceding limitations

They do not suffer from the same non-linearity as a spring.

The ideal master clock for a digital system would combine the high Q of the crystal with a good amplitude stabilisation system to produce a sine wave

Ok. I'm with you here. Now you're actually getting into Shannon theory, too (optimal bandwidth for BER).

followed by a buffer to isolate it from the comparator

Very good! Most folks miss this.

Even so, if the amplitude of the sine wave changes, then dV/dt at the zero crossing also changes

Frequency is independent of amplitude. Any hysteresis on the comparator works in both directions and hence cancels out. Oh wait, I see your point. Yes, if the amplitude is varying with time then it will directly lead to a corresponding jitter component.

Hence, I believe you summarize that a good clock will be a sinewave type with amplitude stability (voltage regulation), and a buffer to drive the comparator. I gotta agree with you there! There's more to the story, though. You have to transfer that quality signal into another circuit without distortion. That requires transmission lines and impedance matching, etc.

jh

[EC8010]

Yes, it's true that DACs output current, but many produce variable width pulses (PWM) so that means they deliver charge (Q = It), rather than current, and when connected to a capacitor; V = Q/C.

Springs might not be perfectly linear, but it certainly isn't a square law. Otherwise, how would kitchen scales based on springs work?

Yes, you're right, my conclusion is that an ideal clock would start with an amplitude stabilised sine wave oscillator buffered away from the following comparator. And yes, we're now into transmission line problems in actually using the output. All the more reason to put the clock next door to the DAC.

[Elso Kwak]

Hi EC8010,
I thought you were going to explain how a Colpitts oscillator works.....
Better build and give us an example of a circuit with your ideas implied.
I am missing the analysis of various types of crystals: AT, BT, SC-cut.

Comparing with mechanics/ physics/ springs is confusing to me.

Cannot not confirm your findings about buffers, tried them though. My 45.1584MHz clock has a buffer though (for other reasons).
High input currents into the comparator?? AD8561's input capacitance is 3pF typical.

[current is a stream of charges, hahahaha]

The masterclock is also needed in the transport as all the decoding and processing is done there. If you find a way to transport the clock without losses through a transmission line it does not matter if it is located in the player or in the separate DAC. Best is anyway using I2S Direct if possible and as I am using a NON-OS DAC I don't need the masterclock in the DAC (only wordclock and bitclock) so I leave the masterclock in the transport.

[hagtech]

Springs might not be perfectly linear, but it certainly isn't a square law

Really, they are! I had it wrong (from memory), though, I said 'force'. Actually, it is the 'energy' that is proportional to the square of the spring displacement.

U = 1/2 * k * x*x;

where k is the spring constant. To get force you then differentiate (dU(x)/dx).

No idea how they get scales to work. Maybe you just keep displacement really low?

jh

[SY]

Hooke's Law really does work pretty well for elastic materials (like spring steel). And since weight is force, kitchen scales work pretty linearly. As do meter movements.

[andrei]

Look up to hams to see some serious low noise oscillator designs - for example, the one for Linrad hardware. If you wonder why running the oscillator in Class C is a good thing, check out this paper.

[Elso Kwak]

Originally posted by andrei
Look up to hams to see some serious low noise oscillator designs - for example, the one for Linrad hardware. If you wonder why running the oscillator in Class C is a good thing, check out this paper.

A FET works better in the oscillator.
I could not open the second file!

[EC8010]

Neither could I!

[andrei]

Originally posted by Elso Kwak
A FET works better in the oscillator.

Take a closer look at the phase noise measurements of Linrad oscillator - they are exceptionally good. Elso, if you have measured the phase noise of your clock, I would love to see it, especially if you think they are better.

I could not open the second file!

I guess I am enjoying an institutional subscription... Here is the direct link to the paper.