24 to 18 bit conversion ???

Lyra · 8th March 2006, 08:43 PM

Is it possible to take a 24-bit (or 20...) left justified or I2S timed signal (LR alternating) and convert it to 18-bit Left Justified MSB-first (LR alternating) ?

I have been looking around here (...and the web....) without any information around this "problem"

Lyra

rfbrw · 8th March 2006, 09:16 PM

Quote:

Originally posted by Lyra
Is it possible to take a 24-bit (or 20...) left justified or I2S timed signal (LR alternating) and convert it to 18-bit Left Justified MSB-first (LR alternating) ?

I have been looking around here (...and the web....) without any information around this "problem"

Lyra

It is a simple task that depends to certain extent on the source but why would you choose to truncate 6 bits?

Lyra · 8th March 2006, 09:38 PM

I want to truncate the signal because I want to replace a defective and obsolete! AD-converter.
The original AD-converter deliver 18-bit, but there arent so many (if any) 18-bits converters available, and the rest of the circuit expect 18-bit...and wouldn't/ couldn't handle more bits.
24-bits AD-converters on the other hand.....is widely available.

So...how do I manage to trunkate the signalflow from one newer and relatively good AD-converter ?

Lyra

rfbrw · 9th March 2006, 12:41 AM

With I2S and left justified data, wordlength does not matter as excess bits are simply ignored.

Francis_Vaughan · 9th March 2006, 05:52 AM

Truncation would not in itself be difficult. A small PLA, or a handful of logic chips. On the other hand the audio will not take kindly to simple truncation. You must dither the signal again to decorrelate the new least signignificat bit. Otherwise it will not sound good at all. Doing this well is not trivial.

Edit:
Hang, on - you want to do the opposite. this should be fine - a 24 bit DAC will usually pad out and work OK.

Rescue Toaster · 9th March 2006, 08:48 AM

Francis, it's an ADC not DAC.

I think the problem is a 24 bit ADC might be operating at a different bitclock than the 18 bit was. IE, it possible but it might not be easy. If the old 18 bit ADC padded out to 32 bits (thus 64 bitclocks per wordclock) it should be easy. If it did something funny and run at like 36 bitclocks per wordclock it would be pretty hard.

Can you post part numbers for the old ADC chip and the next chip in the line? (whatever the ADC is sending it's data to)

Francis_Vaughan · 9th March 2006, 10:15 AM

Oops...

Should read closer.

OK, dither is a problem. And indeed bit clock rate - that could be fixed - but the dither is not easy.

Lyra · 9th March 2006, 10:24 AM

The SM5847 (or similar) do some of the work I think, but the format out is on separate pins....and it should be on the same pin altenating with the L/R signal....

Am I way out here, or could this be a part of the sollution ??

Lyra · 9th March 2006, 10:43 AM

Quote:

Originally posted by Rescue Toaster
Francis, it's an ADC not DAC.

I think the problem is a 24 bit ADC might be operating at a different bitclock than the 18 bit was. IE, it possible but it might not be easy. If the old 18 bit ADC padded out to 32 bits (thus 64 bitclocks per wordclock) it should be easy. If it did something funny and run at like 36 bitclocks per wordclock it would be pretty hard.

Can you post part numbers for the old ADC chip and the next chip in the line? (whatever the ADC is sending it's data to)

The old chip is a CS5389-KP, and it sends the data into the DSP in an Lexicon PCM90 (via a 74HC08), and I am quite sure that I can do nothing with the way the DSP expects the signal...it's way to complicated to alter !!?

I am posting a zip-file containing a piece of the Data Output Timing chart regarding the old AD-converter the way I think it is used in this perticular equipment

rfbrw · 9th March 2006, 11:02 AM

Just about every audio ADC runs SCLK at 64Fs in at least one format and so long as the CS5389 you are replacing was set to I2S or Left justified data, the wordlength will take care of itself.
From audio quality POV though, simply chopping off 6 bits is less than ideal. The SM5847 will not, however, solve your problem. It is an oversampling filter and I doubt the circuitry downstream from the CS5389 was designed to cope with 8x oversampled data.
If you cannot find an 18bit dac try a 16 or a 20 bit one. The PCM1801 and PCM1800 from TI are current production 16 and 20 bit dacs respectively. TI also have an 18 bit dac but it is considerably more expensive than any other ADC and requires an external decimation filter.

8th March 2006, 08:43 PM	#1
Lyra diyAudio Member Join Date: Nov 2003 Location: Norway	24 to 18 bit conversion ??? Is it possible to take a 24-bit (or 20...) left justified or I2S timed signal (LR alternating) and convert it to 18-bit Left Justified MSB-first (LR alternating) ? I have been looking around here (...and the web....) without any information around this "problem" Lyra

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8th March 2006, 09:38 PM	#3
Lyra diyAudio Member Join Date: Nov 2003 Location: Norway	I want to truncate the signal because I want to replace a defective and obsolete! AD-converter. The original AD-converter deliver 18-bit, but there arent so many (if any) 18-bits converters available, and the rest of the circuit expect 18-bit...and wouldn't/ couldn't handle more bits. 24-bits AD-converters on the other hand.....is widely available. So...how do I manage to trunkate the signalflow from one newer and relatively good AD-converter ? Lyra

9th March 2006, 12:41 AM	#4
rfbrw diyAudio Member Join Date: Oct 2001 Location: .	With I2S and left justified data, wordlength does not matter as excess bits are simply ignored.

9th March 2006, 05:52 AM	#5
Francis_Vaughan diyAudio Member Join Date: Feb 2005 Location: Adelaide	Truncation would not in itself be difficult. A small PLA, or a handful of logic chips. On the other hand the audio will not take kindly to simple truncation. You must dither the signal again to decorrelate the new least signignificat bit. Otherwise it will not sound good at all. Doing this well is not trivial. Edit: Hang, on - you want to do the opposite. this should be fine - a 24 bit DAC will usually pad out and work OK.

9th March 2006, 08:48 AM	#6
Rescue Toaster diyAudio Member Join Date: May 2005 Location: Wisconsin!	Francis, it's an ADC not DAC. I think the problem is a 24 bit ADC might be operating at a different bitclock than the 18 bit was. IE, it possible but it might not be easy. If the old 18 bit ADC padded out to 32 bits (thus 64 bitclocks per wordclock) it should be easy. If it did something funny and run at like 36 bitclocks per wordclock it would be pretty hard. Can you post part numbers for the old ADC chip and the next chip in the line? (whatever the ADC is sending it's data to)

9th March 2006, 10:15 AM	#7
Francis_Vaughan diyAudio Member Join Date: Feb 2005 Location: Adelaide	Oops... Should read closer. OK, dither is a problem. And indeed bit clock rate - that could be fixed - but the dither is not easy.

9th March 2006, 10:24 AM	#8
Lyra diyAudio Member Join Date: Nov 2003 Location: Norway	The SM5847 (or similar) do some of the work I think, but the format out is on separate pins....and it should be on the same pin altenating with the L/R signal.... Am I way out here, or could this be a part of the sollution ??

9th March 2006, 11:02 AM	#10
rfbrw diyAudio Member Join Date: Oct 2001 Location: .	Just about every audio ADC runs SCLK at 64Fs in at least one format and so long as the CS5389 you are replacing was set to I2S or Left justified data, the wordlength will take care of itself. From audio quality POV though, simply chopping off 6 bits is less than ideal. The SM5847 will not, however, solve your problem. It is an oversampling filter and I doubt the circuitry downstream from the CS5389 was designed to cope with 8x oversampled data. If you cannot find an 18bit dac try a 16 or a 20 bit one. The PCM1801 and PCM1800 from TI are current production 16 and 20 bit dacs respectively. TI also have an 18 bit dac but it is considerably more expensive than any other ADC and requires an external decimation filter.

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