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Old 1st March 2006, 08:35 PM   #11
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Join Date: Feb 2002
Location: Nantes
Thanks for the reply. So if I always have the same word lenght and sck, I can do with logic. If it changes, I have to implement it with some complexer logic or simplier CPLD.

In fact I want to do this with my PC with a M-audio revolution hacked to export i2S signals, but I don't know how is the i2s signal configuration. I hope it's always 32bits word length but don't know about sck, do you know this???

Thanks a lot

Hugues
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Old 1st March 2006, 09:04 PM   #12
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If it is I2S then it will meet the requirements of the I2S Bus specification. If it doesn't it will be something else. The configuration of the onboard dacs will give you an idea of the format.
You might want to consider using the shift register method. So long as the number of serial clock cycles per frame remain the same, it will cover all possible wordlength/sample rate combinations
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Old 1st March 2006, 09:07 PM   #13
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I know it's I2S, I red it in another thread....

I will try shifting method

Thanks
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