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Old 1st December 2005, 07:21 AM   #1
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Question 256Fs from 384Fs - How To

Hello, dear all,
while I'm drinking my coffe I'm thinking about how to make clock generation 256Fs from 384 Fs or 512 Fs from 768Fs etc.
I suppose I should use a PLL, but do not know which one exactly - I would like something simple.
I need 384Fs because :
most DF give higher BitClock to Word Clock ratio with 384Fs - DF170x series, which are the only aviable ones. They are for my ultimate design with 2 AD1862s I have got for 5 years now. I just want to make something usefull, although never repeateble, with them.
- 384 Fs is the necessary Sync if synchronisation to the CD is to be used
I need 256Fs because:
Some SR converters will need it /AD 1896, AD 1892/ to work properly. Iwant to design a DAC that can be suitable for most of equipment, not CD-only

PLL1705 may do the job from single 27MHz, but the 384Fs jitter won't be quite low /50pS/
What to do?
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Old 2nd December 2005, 06:34 AM   #2
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So now I'm going to ask a friend for a PLD for this function
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Old 6th December 2005, 06:52 AM   #3
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Isn't there any suitable PLL??
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Old 6th December 2005, 08:52 AM   #4
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Quote:
Originally posted by machinow
Isn't there any suitable PLL??
http://www.standardics.philips.com/products/plls/

http://www.analog.com/en/prod/0,,770...DF4001,00.html

http://www.analog.com/en/prod/0,,770...9850%2C00.html
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Old 7th December 2005, 02:46 PM   #5
gmarsh is offline gmarsh  Canada
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For the lowest jitter possible, a PLL/VCXO combination is the way to go.

My usual "recipe" for these projects is a National LMX2306 or Analog ADF4116 PLL, a VCXO, a well-designed loop filter (google for "Dean's Book") and a PIC12C508A to blast configuration data into the PLL on startup.

I've also used a MC145151 PLL in the past for this, the N and R counters on these are programmed via pin strapping which means you won't need to program a microcontroller. They've got a voltage output PFD though, which complicates loop filter design a little.
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Old 8th December 2005, 01:23 AM   #6
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384fs is 16.??MHz ?

I hope I will not have to use all of this to put DEM on my 1541A. My CDP controller works off 384fs I think.
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Old 8th December 2005, 02:27 PM   #7
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Thanks for your suggestions,
I need low jitter only on 384Fs /16.9344MHz/
The jitter of the 256 Fs is not a problem, as it will be used for a few things.
I'm not clear about the overall design, though, it will be very hard one....... I'm thinking for a 4-layer PCB as well and a suitable DF
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