Decoupling of AD1865

[PatPet]

Hi,

I'm finallizing the bypass configuration for the supply pins.

However I'm stuck with either "on the chip" decoupling with 0.1uF cap only or adding extra lytic caps on each pin.

I'm not sure whether the lytic cap is a must, or the on chip decoupling would be more than enough.

Anyone, who did experiments related to this, would like to share the experience?

PatPet

[bogicp]

Originally posted by PatPet
Hi,

I'm finallizing the bypass configuration for the supply pins.

However I'm stuck with either "on the chip" decoupling with 0.1uF cap only or adding extra lytic caps on each pin.

I'm not sure whether the lytic cap is a must, or the on chip decoupling would be more than enough.

Anyone, who did experiments related to this, would like to share the experience?

PatPet

"lytic" caps is a must!
Your ceramic 0.1uF "exists" only for high frequencies, but for low frequencies it's a high impedance. Then you must use some bigger caps for low frequencies ( for example 50/60/100/120Hz ARE low frequencies).

You can select some better types, probably tantalum (with low ESR)
or some power supply type low esr electrolytic capacitors...
Usually 2x470uF will be enough for overall board, and put 47-100uF tanatalum near to supply pins (you not need to put it very near like ceramics, one inch is enough).

best regards

-boggy

[paba]

Hi,
atleast do what is in the datasheet for that chip as a bare minimum:
"Each supply should be decoupled to analog common using a 0.1 uF capacitor in parallel with a 10 uF capacitor."

cheers
paba