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#1 |
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diyAudio Member
Join Date: Dec 2004
Location: Bilbao
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Scheme of a plate of evalucion CDB4344-EB. Does not work. The exits of clock and data estan to zero. Some idea. I am not safe of TX and Omck.
I have selected 256 Fs and I2s. They can help me. |
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#2 |
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diyAudio Member
Join Date: Jul 2005
Location: HangZhou
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This came across to me once
Having debug a very long time,I found that the PCB I made myself had a short line betwen the clock footprint and the GND Good luck |
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