Feeding the internal DAC's BCK directly with the player's low jitter clock

Bricolo · 12th July 2005, 11:47 PM

Hi,

Guido Tent adviced on another topic to send directly a low jitter clock to the DAC for the BCK signal, instead of using the BCK from the decoder/filter.

old philips cdp mods

This, for sure, will give a much cleaner clock to the DAC.

But what about non oversampling DACs?
For an I2S configuration, with a 11.2Mhz clock, tell me if I'm wrong but the BCK out of the decoder will be 2.8MHz (master clock/4)

So, in a NON-OS configuration, how can we feed the DAC with this "direct clock". A solution would be to divide the master clock per 4 (with a counter or 2 D flip flops), but a problem seems to exist with this solution: we don't know "where" to divide the clock.
I don't know if this explanation is clear, but the clock/4 can have 4 differents "phases" or "delays", it can have it's rising edge on the 1st, the 2nd, the 3rd or the 4th edge of the master clock.
And if this divided clock doesn't have the edges at the right time (at the same time that the BCK outputted from the decoder) I think that nothing will work.

Any ideas?

Fin · 13th July 2005, 01:24 AM

Quote:

Originally posted by Bricolo

I don't know if this explanation is clear, but the clock/4 can have 4 differents "phases" or "delays", it can have it's rising edge on the 1st, the 2nd, the 3rd or the 4th edge of the master clock.
And if this divided clock doesn't have the edges at the right time (at the same time that the BCK outputted from the decoder) I think that nothing will work.

Any ideas?

Hi Bricolo

You could use the low jitter clock to re-clock the BCK before feeding it to the DAC.

Bricolo · 13th July 2005, 07:56 AM

I know this is one solution, but I was interested in the divide/4 problem more specificly

guido · 13th July 2005, 11:00 AM

You can use an async fifo between dac and decoder.
Works for me

Guido Tent · 13th July 2005, 11:33 AM

Quote:

Originally posted by Fin

Hi Bricolo

You could use the low jitter clock to re-clock the BCK before feeding it to the DAC.

Spot on !

cheers

Bricolo · 13th July 2005, 02:14 PM

yes, I know this would work.

but I wanted to know if the div/4 works or not

Guido Tent · 13th July 2005, 02:26 PM

Quote:

Originally posted by Bricolo
yes, I know this would work.

but I wanted to know if the div/4 works or not

Hi

Should work as well, maybe timing spoils it

Bricolo · 13th July 2005, 02:46 PM

OK so I'll go for reclocking.

After all, having to divide and to reclock in order to attenuate the counter's jitter isn't easier

Guido Tent · 13th July 2005, 02:50 PM

Quote:

Originally posted by Bricolo
OK so I'll go for reclocking.

After all, having to divide and to reclock in order to attenuate the counter's jitter isn't easier

True, reclocking needs only 1 Dff (use low noise power supply here too......)

succes

12th July 2005, 11:47 PM	#1
Bricolo diyAudio Member Join Date: Nov 2002 Location: Grenoble, FR	Feeding the internal DAC's BCK directly with the player's low jitter clock Hi, Guido Tent adviced on another topic to send directly a low jitter clock to the DAC for the BCK signal, instead of using the BCK from the decoder/filter. old philips cdp mods This, for sure, will give a much cleaner clock to the DAC. But what about non oversampling DACs? For an I2S configuration, with a 11.2Mhz clock, tell me if I'm wrong but the BCK out of the decoder will be 2.8MHz (master clock/4) So, in a NON-OS configuration, how can we feed the DAC with this "direct clock". A solution would be to divide the master clock per 4 (with a counter or 2 D flip flops), but a problem seems to exist with this solution: we don't know "where" to divide the clock. I don't know if this explanation is clear, but the clock/4 can have 4 differents "phases" or "delays", it can have it's rising edge on the 1st, the 2nd, the 3rd or the 4th edge of the master clock. And if this divided clock doesn't have the edges at the right time (at the same time that the BCK outputted from the decoder) I think that nothing will work. Any ideas? __________________ Just remember: in theory there's no difference between theory and practice. But in practice it usually is quite a bit difference... Bob Pease

13th July 2005, 07:56 AM	#3
Bricolo diyAudio Member Join Date: Nov 2002 Location: Grenoble, FR	I know this is one solution, but I was interested in the divide/4 problem more specificly __________________ Just remember: in theory there's no difference between theory and practice. But in practice it usually is quite a bit difference... Bob Pease

13th July 2005, 11:00 AM	#4
guido diyAudio Member Join Date: Mar 2002 Location: diepe zuiden	Re: Feeding the internal DAC's BCK directly with the player's low jitter clock You can use an async fifo between dac and decoder. Works for me __________________ GuidoB

13th July 2005, 02:14 PM	#6
Bricolo diyAudio Member Join Date: Nov 2002 Location: Grenoble, FR	yes, I know this would work. but I wanted to know if the div/4 works or not __________________ Just remember: in theory there's no difference between theory and practice. But in practice it usually is quite a bit difference... Bob Pease

13th July 2005, 02:46 PM	#8
Bricolo diyAudio Member Join Date: Nov 2002 Location: Grenoble, FR	OK so I'll go for reclocking. After all, having to divide and to reclock in order to attenuate the counter's jitter isn't easier __________________ Just remember: in theory there's no difference between theory and practice. But in practice it usually is quite a bit difference... Bob Pease


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