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Old 16th June 2005, 05:27 PM   #11
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ok.. heres a detail for the i2s bus which will explain.. that is, dac dig. ground is routed to the digital plane..
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Old 16th June 2005, 05:32 PM   #12
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and heres a slightly altered layout, with a single plane at the dac side..(unfortunately , i cant find a way to connect the two i/v planes.. thoughts? (again?!!!)..
thanks for your long reply..pretty explanative..
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Old 16th June 2005, 06:48 PM   #13
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Costiss,

The analog side is now MUCH better.

As for how to connect the two ground planes. I am not sure. I do not know which package you have used for schematic entry and PCB design. It doesnt look like anything I have used before (Protel and PADS).

The way I have done split planes that are connected is to insert cuts into the plane with "layer specific keepouts". The polygon pour then fills around these. NOTE that the cuts I am referring insert a physical separation between sections of the circuit.

How this is done depends entirely on your software and how it manages its design rules and connectivity (net) information.

Typically though the two planes are joined at the DAC converter device as there is usually an internal connection of some form there anyway. AD have a couple of 'design guide' books that are taken from app notes about correct grounding of ADC/DAC systems for improved noise performance.

Remember when making cuts in the plane that at DC/LF the return currents will flow in the path of least resistance, but at higher frequencies the currents follow the path of least impedance. At HF this usually means on the ground plane DIRECTLY UNDER THE TRACE OF INTEREST.

Eg. A clock signal for a DA Converter goes from the clock to the device, then back via the ground to the clock. The electron flow is back to the clock ground, on the ground plane, DIRECTLY UNDER the trace to the converter. This is the path of least impedance (least inductance usually). By making the return current deviate from this ideal path it introduces a loop area (and loops are very good antennas!).

What this means essentially is that under every trace there should be a ground plane.

Basically go through your circuit and identify the sorts of signals you have... fast clocks, Hi Z opamp inputs, noisy power, clean power, etc and separate them (except where they connect obviously). Fix what you can, i.e. make all supplies clean, insert beads, reservior caps, and decoupling caps on all devices.
Isolate the rest.

Anyway - Enough wisdom emparted this email...

apollyon25
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Old 16th June 2005, 08:35 PM   #14
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thank you very much... i ll make my revisions..
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Old 16th June 2005, 09:21 PM   #15
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and.. this is the last version.. with full plane under the high freq signals....
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Old 17th June 2005, 12:52 AM   #16
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Costiss,

Better!

One other thing... especially if you are going to start actually manufacturing these.
Dont put vias in/on surface mount pads... it changes the thermal load during reflow and you may have reliability problems.

Not an issue if you are just making one... but its a bad habit to get into. I allow 25 thou from edge of pad to edge of the pad of the via, and I also try to avoid placing vias under SMT components.

The latter isnt as critical and I just avoid it from a 'best practice' point of view!

Good luck with it! I hope it sounds brilliant!
(like mine... hehee)

apollyon25
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Old 17th June 2005, 06:28 PM   #17
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nah.. its only for my personal use.. so only 1 piece.. will have it through plated off course.. thanks for the help..
will come up with results in a month or so..
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