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Old 4th June 2005, 10:09 AM   #1
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Default spdif conversion

is it possible to convert the mclk, lrck and srdata into spdif using logic ICs and vice versa? i know this is very complicated but i just want to know if anybody have done this.
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Old 4th June 2005, 02:24 PM   #2
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I saw inside the Theta prototype. You don't want to know how much stuff was inside. Some of it was probably gate arrays of some sort, as not all of the chips were 14/16 DIP.

Jocko
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Old 4th June 2005, 02:39 PM   #3
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Default Re: spdif conversion

Quote:
Originally posted by jondavis
is it possible to convert the mclk, lrck and srdata into spdif using logic ICs and vice versa? i know this is very complicated but i just want to know if anybody have done this.

It can be done but why would you want to?
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Old 4th June 2005, 10:10 PM   #4
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If You mean FPGA/gate array implementation than answer is "yes" someone did this ,but not directly - data flows via Wishbone SoC compilant interface
Some facts about Wishbone interface :
http://www.opencores.com/projects.cg...hbone/wishbone

and here you have IP cores for i2s and spdif interfaces:
http://www.opencores.com/projects.cg...rface/overview
http://www.opencores.com/projects.cg...rface/overview
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Old 6th June 2005, 07:38 AM   #5
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Default Re: Re: spdif conversion

Quote:
Originally posted by Jocko Homo
I saw inside the Theta prototype. You don't want to know how much stuff was inside. Some of it was probably gate arrays of some sort, as not all of the chips were 14/16 DIP.

Jocko

Quote:
Originally posted by rfbrw



It can be done but why would you want to?

I just wanna know if somebody has done that, and i wanna try it too.

I got interest on this when i saw the innards of a theta pearl cdp from a friend. but i can't scrutinize it coz its not mine. it has a data and mclock input taken from a decoder board and output to spdif coax and balance.
its different from other converters because it uses only two input, data and mclock, unlike others with sdata, lrck and mclk, and it uses logic ICs. its pcb is 3" x 5" approx.
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Old 6th June 2005, 12:11 PM   #6
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Default Re: Re: Re: spdif conversion

Quote:
Originally posted by jondavis






I just wanna know if somebody has done that, and i wanna try it too.

I got interest on this when i saw the innards of a theta pearl cdp from a friend. but i can't scrutinize it coz its not mine. it has a data and mclock input taken from a decoder board and output to spdif coax and balance.
its different from other converters because it uses only two input, data and mclock, unlike others with sdata, lrck and mclk, and it uses logic ICs. its pcb is 3" x 5" approx.

In this case you have a transmitter that only has to support a single data rate and need not concern itself with user data and other such flummery. This makes things considerably simpler.
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Old 9th June 2005, 02:11 PM   #7
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I worked on this very implementation in 1996 and submitted my findings to Electronics World which was published in June of 1997

The basic idea is to extract LRCK BitClOCK and DATA feed them
individually into 74AC74 flipflops from a CD player
You then need to buffer those signals enabling 75 ohm
transfer using a Maxim Max 497. Then at reception the DAC
end the aforementioned signals feed 74AC74 devices again
the advantage here is that differnt clock speeds can be accomodated relative to the ics at each end.ie you can tailor
clock speed for the DF1700 or equivalent., leaving the players
MCK to feed the transmission end flip flops.

There is as a result of this no CS8412 or other SPDIF
multiplexing ic. The only downside i can see is that
the player and DAC are tied together - there is no
convenient way of changing this DAC for another.
But there is no need in any case.

Cheers / Chris
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Old 9th June 2005, 07:32 PM   #8
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I think you misunderstood the point of the thread Chris; from what I understand jondavis wanted to know how to convert I2S to SPDIF without using a Crystal (or similar) RX IC.
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Old 10th June 2005, 04:36 AM   #9
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Thanks Chris 719
We may need to ask jondavis
why would you need to fabricate
an SPDIF multiplex when transfer
of BCK DATA and LRCK
can be achieved more simply.

To help with the thread starters question
if you actually need to construct this you would need
to carefully study Sony and Phillips data to guage
the extent of what you are entering into

Taking this light heartedly .........
Carefully invite their executives to dinner
to plan the circuits construction. Invite James Bond
or Lara Croft along too ,to get all the after hours
details.

I personally dont think you would ever get to the
end of it, such a circuit breadboarded may well be of such
a size that you may have to ask your neighbour
to move out.

Cheers / Chris
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Old 10th June 2005, 12:29 PM   #10
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Quote:
Originally posted by Chris Daly
Thanks Chris 719
We may need to ask jondavis
why would you need to fabricate
an SPDIF multiplex when transfer
of BCK DATA and LRCK
can be achieved more simply.

He answers in post #5
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