Does digital data inverted results in analog signal inveted?

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Hi guys,

I am trying to end of a DAC output with SRPP tube stage (phase inveted).

If I add a hex inverter, say 7404, to invert digital sdata of digital receiver and feed into DAC. Would the analog output inveted??:confused: :confused:

If it is inverted, then final output from SRPP stage will be in normal phase..:confused: :D
 
Tubeee said:
Hi guys,

I am trying to end of a DAC output with SRPP tube stage (phase inveted).

If I add a hex inverter, say 7404, to invert digital sdata of digital receiver and feed into DAC. Would the analog output inveted??:confused: :confused:

If it is inverted, then final output from SRPP stage will be in normal phase..:confused: :D

Depends on the dac, or better the coding of the data. With two's complement coding (e.g. the way a tda1541 is usually used) that works. Check your dac's/filter/receiver datasheet.

Why invert anyway? Do you care that much about absolute phase? I wonder if you can hear the difference
 
Thank you all guys,

It will be installed in a 8412-1541 so I think it will work.

The reason I want to reverse phase is that there are many recordings were done by wrong phase and I would like to check what's difference in reverse phase.

By the way, there is a track demonstrating "in phase" and "out of phase" sounds in a CD "Test & Burn-in CD" published by Sheffield/XLO. It is designed to fine tune the "toe in" angle of speakers. Does anyone experienced this? Will the "in phase" turnning into "out of phase" when inverted phase is applied by DAC?

Bernhard, I know the one bit of LSB error. It had been discussed but I don't think it will be an issue since all bits are shifted.
 
be aware...

Tubee...

you must take some care when phase is the matter.

Sheffield Labs CD and many others offers phase test track regarding phase between channels, when phase of right channel is reversed to the left channel, and this way you will listen to a significant difference between in phase/out of phase signals. In phase signals is a MUST BE in this case.

At other side, phase regarded by the data signal as you asked, will invert both channels at same time, resulting in a IN PHASE signal anyway.

One thing is to invert the phase between channels and is completely different from inverting phase signal overall, and IMHO, we hardly heard the difference (overall data inverting), unless you have a very good room, loudspeakers, and confident amplifiers... and very good ears too.


Got it?

Best regards...

Euclides.

:eek:
 
LSB error

uhmm..
I was concerned about this error when inverting the digital to get balanced analog signal out... but, when analised at osciloscope and DVM, I realised 1 LSB error is so small voltage error that op. amp. offset error will mask, even precision OP.amp. like AD797.
So, you can adjust this small LSB error summing with offset voltage error at adj pins...

(my DAC is 20 bits precision, PCM1702)


Am I misunderstanding this??
:scratch: :spin: :confused:
 
some DACs are using Gray coding with just one bit changed beetween neighbour values to get rid of peaks coused by non equal change of state. In 'normal' coding when 0111 1111 1111 1111 changes into 1000 0000 0000 0000 15 bits are changed and imagine how it looks if they don't do it simultanously. Assuming neighbour value change is most probable Gray coding make sense. Than inverters will destroy the wave. Anyway if you want to experiment with phase why not simply put speakers out of phase?
regards
 
regret to say- I cannot, probably they don't exist
my appologies
this seemed a common sense upgrade to me used commonly in ADSs (flash), digital modulation ... just to name two.
I am confused why they are not popular in D/A convertion....??:confused:
in the future I will be more precise and won't let empty words to flow out from my fingers to my keyboard
HONESTLY
sorry for this, for language and so on
 
you have the answer...

yes,
darkfenriz,

you had answer you doubt. Grey code leads to that situations you exposed, and the BTC code does not. If you read carefully the PCM 1702 datasheet you will find an upgrade for even more confidence in the code, when BB uses balanced decoders, assuring digital zero and neighbor values are LSB steps around zero. This can explain why BTC is the choice for audio DACs.
Besides this fact, I think CS8412 and 14 outputs only BTC code, althrough not mentioned in datasheet, we can say that as DF1704, wich is fully compatible with CS8412 and 14, only accepts BTC, MSB first, 16 to 24 bits.
Cool isn´t it?
hey Tubeee, sorry for off topic posting.

Regards.
Euclides.;)
 
As for inverting a 2's complement data word, and if it's a serial data stream with the LSB coming first, a back-of-the-envelope schematic sketch looks like one could do the "invert and add 1" requirement for true 2's C inversion with just a few gates and a latch clocked off the serial data clock. Things start by adding a 1 to the LSB, that will produce an altered LSB and a carry bit. Thats where a few and and or gates are used to do that. The carry would feed a latch that is clocked off the same clock the serial bitstream is clocked from. That will make the carry bit line up in therms of time with the arrival of the 2nd LSB. and then we add the carry to the 2nd LSB, and produce a new 2nd LSB and a new carry bit. And so on all the way up to the MSB sign bit. The carry bit latch would be set to make a 1 at the beginning of the serial word.

As to why even bother with digital inversion, well....
 
Only if you are incompetent.

No, you cannot convert the most negative value (1000 0000 ....) into it's associated most positive two's complement value. You'll get an overflow error (0111 1111 .... + 1 = 1000 0000 .... :att'n: ).

The only way to do so is a simple negation (or one's complement) of your data stream and live with one LSB DC error. Or you have to satuarate your datastream when inverting your two's complement datastream. But this cannot be done with some simple gates.
 
bocka said:

No, you cannot convert the most negative value (1000 0000 ....) into it's associated most positive two's complement value. You'll get an overflow error (0111 1111 .... + 1 = 1000 0000 .... :att'n: ).

The only way to do so is a simple negation (or one's complement) of your data stream and live with one LSB DC error. Or you have to satuarate your datastream when inverting your two's complement datastream.

Or you simply map it to the most negative but one. Either way there are no clicks.


But this cannot be done with some simple gates.

Every logic device all the way up to Collosus and Skynet, is ultimately made up of simple gates, so yes it can be done with simple gates.
 
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