A good way to reduce R-2R DAC linear error

[AD1865]

For example, we can record the output current of selected PCM1704 with the input code from 000000 to FFFFFF. Then we can use computer to correct the code with minimum liner error. Save the input code and the correct code to an EPROM and use a CPLD to convert the code, we can have much better performance.

[Bernhard]

Originally posted by AD1865
For example, we can record the output current of selected PCM1704 with the input code from 000000 to FFFFFF. Then we can use computer to correct the code with minimum liner error. Save the input code and the correct code to an EPROM and use a CPLD to convert the code, we can have much better performance.

I had posted that idea recently, the big big problem is that for a PCM1704 you have to measure 16 000 000 ( in words: 16 million )codes.

No idea how fast DVMs are, maybe you can get a 6 1/2 DVM with 10 measurements / s, it will take 19 days.

You need a software that compares the measured current with the theoretical current and stores the 24 bit code at the 16bit code adress of the eprom.

There have been answers how to simplify that, but nothing really helpful.

Somebody would have to write a program that reeads data from DVM, sends data to PCM1704, compares data with a table of currents, decides if the read data from the DVM is inside the window of what is acceptable deviation, writes a file that can be read by an eprommer.



Now please nobody tell me that this can be done very simple with a DSP &%§$§* unless doing it for me.

[rfbrw]

You chaps clearly have too much time on your hands.

[Guido Tent]

Originally posted by AD1865
For example, we can record the output current of selected PCM1704 with the input code from 000000 to FFFFFF. Then we can use computer to correct the code with minimum liner error. Save the input code and the correct code to an EPROM and use a CPLD to convert the code, we can have much better performance.

Hi

Question: Why does the error occur ?

regards

[Jocko Homo]

You have such a succinct manner of stating what I am thinking. Maybe we should make you a moderator, with the ability to erase some of these pointless threads.

Jocko

[Bernhard]

Originally posted by Guido Tent


Question: Why does the error occur ?

Maybe because there is an error ?

Or did you find any statement in the datasheet like:

The PCM1704 is the worlds first errorless DAC which is fully monotonic and guarantees 24 bit linearity in the K-selection ?

[Bernhard]

Read this carefully and try to understand:

Quote from the PCM1702 datasheet:

Even though absolute integral and differential linearity specs are not given for the PCM1702, the extremely low THD+N performance is typically indicative of 17-bit integral linearity in the DAC. The relationship between THD+N and linearity, however is not such that an absolute linearity specification for every individual output code can be guaranteed.


The PCM1704 datasheet is missing some specs.

[Elso Kwak]

Originally posted by AD1865
For example, we can record the output current of selected PCM1704 with the input code from 000000 to FFFFFF. Then we can use computer to correct the code with minimum liner error. Save the input code and the correct code to an EPROM and use a CPLD to convert the code, we can have much better performance.

Hi AD1865,
Better use an AD1865JK not needing adjustment.........

[Jocko Homo]

I have never been fond of the low-level linearity in the >20-bit B-B DACs, compared to say.........the AD1862.

Still, I have better things to do other than worry about it.

More power to you if you have the time and energy to expend on such ventures.

Jocko

[banana]

I guess AD1865 means there is 8-bit extra dynamic range for the PCM1704.

We might make use of the extra bits, setup a calibration file in the interpolation filter to compensate low level linearity error.

But like Jocko said, the linearity error of PCM1704 is so small that I wouldn't be bothered too.


Mark No.30.6 measurement