Hello everybody !
this is my first post on this forum
I am interfacing a PCM1723 Burrbrown DAC with a DSPIC dsp/uC thru I2S, but I have a little problem.
The DSPIC is configured for 16 bit data word size, frame has 2 datawords, as well as frame synch is configured for I2S frame sync pulse. Also, the audio bit clock is generated by the dspic, but seems like its only possible to get 64Fs bit clock with Sampling Rate = 48000Hz.
http://www-s.ti.com/sc/ds/pcm1723.pdf
This is the datasheet of the DAC ...
I have read it numerous times, but I dont really understand if it would work correctly with this 64Fs bit clock frequency.
As I understand the I2S protocol allows transfering of 2 data words, marked by the boundaries of the Word Clock signal.
WS = 0 Left Channel .. and 16 bitclocks are required to shift the 16bits of Left channel data.
WS = 1 Right Channel, another 16 bitclocks for shifting the 16bits of Right channel data.
this gives us a 32bit data frame legth, for transfering both audio channels, so 32Fs, bit clock must be 32*48000 = 1536000Hz,
Am i thinking the right way ? or am i missing something?
The interface works, i successfully synthesized a simple square wave, but i havent been able to make it work in stereo. Both channels the DAC outputs, output the same waveform.
I've done numerous experiments on trying to mute one of the channels writing 0's when the appropiate word is being transmitted for that channel .. but still , same wave on both channels ....
I am wondering if its the fact that the dspic is outputing a 64Fs bitclock frequency, when actually a 32Fs is needed ?
I have tried to setup the bit clock frequency on the dspic for 32Fs, but the WordClock that the pic outputs, halves aswell (from 48000 to 24000hz)
Someone please correct me if i am wrong..
The PCM1723 datasheet simply dont talk about bit clock frequencies what it supports ... no info about oversampling either ... would this mean that it is a NON oversampling DAC, and it would require a 32Fs bitclock, for transferring 2 16bit words, on 1 WS cycle, in a correct manner ?
I have been on this for 4 days straight.. and i think i'm really missing something important
ok i think thats it
Any kind of advice is appreciated
KostiX
this is my first post on this forum
I am interfacing a PCM1723 Burrbrown DAC with a DSPIC dsp/uC thru I2S, but I have a little problem.
The DSPIC is configured for 16 bit data word size, frame has 2 datawords, as well as frame synch is configured for I2S frame sync pulse. Also, the audio bit clock is generated by the dspic, but seems like its only possible to get 64Fs bit clock with Sampling Rate = 48000Hz.
http://www-s.ti.com/sc/ds/pcm1723.pdf
This is the datasheet of the DAC ...
I have read it numerous times, but I dont really understand if it would work correctly with this 64Fs bit clock frequency.
As I understand the I2S protocol allows transfering of 2 data words, marked by the boundaries of the Word Clock signal.
WS = 0 Left Channel .. and 16 bitclocks are required to shift the 16bits of Left channel data.
WS = 1 Right Channel, another 16 bitclocks for shifting the 16bits of Right channel data.
this gives us a 32bit data frame legth, for transfering both audio channels, so 32Fs, bit clock must be 32*48000 = 1536000Hz,
Am i thinking the right way ? or am i missing something?
The interface works, i successfully synthesized a simple square wave, but i havent been able to make it work in stereo. Both channels the DAC outputs, output the same waveform.
I've done numerous experiments on trying to mute one of the channels writing 0's when the appropiate word is being transmitted for that channel .. but still , same wave on both channels ....
I am wondering if its the fact that the dspic is outputing a 64Fs bitclock frequency, when actually a 32Fs is needed ?
I have tried to setup the bit clock frequency on the dspic for 32Fs, but the WordClock that the pic outputs, halves aswell (from 48000 to 24000hz)
Someone please correct me if i am wrong..
The PCM1723 datasheet simply dont talk about bit clock frequencies what it supports ... no info about oversampling either ... would this mean that it is a NON oversampling DAC, and it would require a 32Fs bitclock, for transferring 2 16bit words, on 1 WS cycle, in a correct manner ?
I have been on this for 4 days straight.. and i think i'm really missing something important
ok i think thats it
Any kind of advice is appreciated
KostiX
The 1723 will happilly take 64fs data in, if you look at figure 6 you will see that this is its usual mode. It sees 32 bit clocks per channel, if you are only sending it 16, the first are the actual data and the remainder are zeros. You can use this to handle any bit depth you want.
I see your primary problem being that by default the chip runs in what they call "normal" mode which does NOT use I2S. You have to program the chip over its I2C interface and set the appropriate bit in the appropriate register to set it to I2S mode.
The mon/stereo switch is also set the same way, but its supposed to default to stereo. My guess is that it really is in stereo but due to the differences in "normal" and "I2S" formats you see what looks like the same waveform even though the chip is in stereo mode.
I see three options for you, modify the DSP so it sends out the "normal" format instead of I2S, program the DAC for I2S mode (if you have a u-controler handy its easy) (note this has to be done every time it powers up, it does NOT save the sate), or us a different DAC that has input format select via a dedicated chip pin rather than from programming.
John S.
I see your primary problem being that by default the chip runs in what they call "normal" mode which does NOT use I2S. You have to program the chip over its I2C interface and set the appropriate bit in the appropriate register to set it to I2S mode.
The mon/stereo switch is also set the same way, but its supposed to default to stereo. My guess is that it really is in stereo but due to the differences in "normal" and "I2S" formats you see what looks like the same waveform even though the chip is in stereo mode.
I see three options for you, modify the DSP so it sends out the "normal" format instead of I2S, program the DAC for I2S mode (if you have a u-controler handy its easy) (note this has to be done every time it powers up, it does NOT save the sate), or us a different DAC that has input format select via a dedicated chip pin rather than from programming.
John S.
thanks for reply
hello again!
i appreciate the quick reply
about the dac, it is configured properly, I did it thru the SPI port of the dspic, so the configuration of the dac is set to I2S, aswell as stereo at 48kHz. I am sure that the configuration is loaded correctly, because i have tried different output configurations, and when i set it to mute one of the channels, it does mute.
the dspic is configured for I2S frame sync mode, aswell as 16bit dataword, and frame length is set to 2 words.
but yet it doesnt work
now i suppose i am writing the buffers of the codec interface in the dspic in some incorrect manner.
If someone have any experience with using the I2S protocol , specifically with the dsPIC, i would appreciate any advice bout how to fill the buffers in the interrupt routine.
cheers
hello again!
i appreciate the quick reply
about the dac, it is configured properly, I did it thru the SPI port of the dspic, so the configuration of the dac is set to I2S, aswell as stereo at 48kHz. I am sure that the configuration is loaded correctly, because i have tried different output configurations, and when i set it to mute one of the channels, it does mute.
the dspic is configured for I2S frame sync mode, aswell as 16bit dataword, and frame length is set to 2 words.
but yet it doesnt work
now i suppose i am writing the buffers of the codec interface in the dspic in some incorrect manner.
If someone have any experience with using the I2S protocol , specifically with the dsPIC, i would appreciate any advice bout how to fill the buffers in the interrupt routine.
cheers
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