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Old 25th April 2005, 10:22 PM   #1
Bricolo is offline Bricolo  France
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Default New Analog Device clock distribution and generation, with 225fs jitter!

225 femtosecond! but in 12kHz-20MHz

Just remember: in theory there's no difference between theory and practice. But in practice it usually is quite a bit difference... Bob Pease
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Old 25th April 2005, 11:01 PM   #2
bitrate is offline bitrate  Poland
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When using PLL circuits main jitter performance is dependent of the jitter generated by VCXO.Look at this document:
It is jitter spec. of Ti CDC7005 with diferent VCXO's When acting as a buffer 1:1 ,jitter added to signal is only 11fs . Good low noise VCXO may cost much much more than 200$
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Old 26th April 2005, 01:22 PM   #3
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Default Re: New Analog Device clock distribution and generation, with 225fs jitter!

Originally posted by Bricolo
225 femtosecond! but in 12kHz-20MHz



The short term jitter is of importance, but it is not that difficult to make that low. Ofcourse 12kHz jitter content is not that interesting.

The LF and sub LF counts when it comes to audibility, as the ear is much more sensitive there.

Guido Tent
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