74ac02 unused input pins

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Yes, but keep in mind that with both inputs grounded, the output will be high. Ground that, and you are asking for trouble. Generally, you can ground all unused inputs; leave unused outputs unconnected. Some logic types may have pull-up resistors on the inputs (or even the outputs) which is a consideration when determining whether you want to pull-up or pull-down the unused inputs. With AC series though, you should be fine either way.
 
Guido, et al., I agree with seoman

I really question the suggestion to ground the unused
outputs.

It's always good practice to pull up all unused
inputs (with resistor, such as 1K unless the input is in
a gate you're using which might require pulling low)

If the unused output is naturally going low as a result
of your input setting, you still have the potential for
pulling current through the output and I don't see
that as a good or safe thing. I can't see how
connecting the output to ground will have any
salutary effect as the only think it can do is
cause more currents (hopefully DC) to circulate.

I also agree with Jocko to avoid AC logic (and "FACT' as well)
 
BrianL said:
Guido, et al., I agree with seoman

I really question the suggestion to ground the unused
outputs.

It's always good practice to pull up all unused
inputs (with resistor, such as 1K unless the input is in
a gate you're using which might require pulling low)

If the unused output is naturally going low as a result
of your input setting, you still have the potential for
pulling current through the output and I don't see
that as a good or safe thing. I can't see how
connecting the output to ground will have any
salutary effect as the only think it can do is
cause more currents (hopefully DC) to circulate.

I also agree with Jocko to avoid AC logic (and "FACT' as well)

Hi

I suggest you draw out the equivalent circuit that arises when you follow my suggestion. Include buffer output R and leadframe inductances.

Ofcourse no DC currents will circulate when you connect a low output signal to ground.

The reason I propose this is to lower the inductance between internl reference and PCB ground, and to add damping, to reduce induced noise in your in and outputs.

best regards
 
Guido Tent said:
Ofcourse no DC currents will circulate when you connect a low output signal to ground.
Which negates the whole purpose of connecting low outputs to ground? :)

Depending on logic family, you'll probably still have some quiescent current - the output complimentary pair is often biased to make it run a bit faster. I know F-series TTL does this, i'm not sure about different CMOS families.

Also during turn-on/turn-off when the supply rail is out of limits, the output of the logic might be momentarily high. I've personally encountered this... now suppose the circuit it's in has 10,000uF of decoupling on the logic supply and it's unplugged from the wall, that 10,000uF at 2 volts or so might end up almost completely being dumped into the output transistors of a part.

I wouldn't do it.

As for AC logic... if it was a bad idea to use it, they wouldn't make it... I've used it without any problems, but keep in mind that it's noisy - the output slew rate is fast so series output termination is almost always needed, and it will smack its power supply all over the place unless you put excellent decoupling on it.
 
gmarsh said:

Which negates the whole purpose of connecting low outputs to ground? :)

Depending on logic family, you'll probably still have some quiescent current - the output complimentary pair is often biased to make it run a bit faster. I know F-series TTL does this, i'm not sure about different CMOS families.

Also during turn-on/turn-off when the supply rail is out of limits, the output of the logic might be momentarily high. I've personally encountered this... now suppose the circuit it's in has 10,000uF of decoupling on the logic supply and it's unplugged from the wall, that 10,000uF at 2 volts or so might end up almost completely being dumped into the output transistors of a part.

I wouldn't do it.

As for AC logic... if it was a bad idea to use it, they wouldn't make it... I've used it without any problems, but keep in mind that it's noisy - the output slew rate is fast so series output termination is almost always needed, and it will smack its power supply all over the place unless you put excellent decoupling on it.

Hi

What's the fuzz on DC ? When it comes to digital audio, only the switching characteristics are important.

You may want to ignore that, it doesn't bother me but you'll miss the point when it comes down to jitter......

regards
 
Guido Tent said:
Hi

What's the fuzz on DC ? When it comes to digital audio, only the switching characteristics are important.

You may want to ignore that, it doesn't bother me but you'll miss the point when it comes down to jitter......

regards
I understand your point - I've seen programmable logic which has 'user programmable grounds' which perform the same function. When you have huge numbers of simultaneous switching outputs on a CPLD/FPGA, ground bounce becomes an issue.

But these chips are designed for such things, 74-series logic is not. So give it a try - but don't be surprised if your chip fails. That's my point.
 
gmarsh said:

I understand your point - I've seen programmable logic which has 'user programmable grounds' which perform the same function. When you have huge numbers of simultaneous switching outputs on a CPLD/FPGA, ground bounce becomes an issue.

But these chips are designed for such things, 74-series logic is not. So give it a try - but don't be surprised if your chip fails. That's my point.

Hi,

Thanks for feedback

A single inverter is enough to create significant groundbounce. The crosscurrent may peak to 10mA peak in ns, multiply that by a few nH and you're in tens of mV (at the most important part of te transition)

I wouldn't suggest it if I hadn't tried it.......

cheers
 
Guido Tent said:
Hi,

Thanks for feedback

A single inverter is enough to create significant groundbounce. The crosscurrent may peak to 10mA peak in ns, multiply that by a few nH and you're in tens of mV (at the most important part of te transition)

I wouldn't suggest it if I hadn't tried it.......

cheers
I'm tempted to verify how much of an effect this makes. I'll hook up a 74HC04 chip, drive a fast-edged square wave into a single inverter and tie the rest of the inputs to +5V. I'll measure one of the "low" outputs with a scope, and I'll start tying the rest of the low outputs to ground and look for a difference.

Now, If ground bounce is a big concern in your designs, I hope you're using "just fast enough" logic in TSSOP packages decoupled with an 0603 SMT ceramic on each side. :D
 
gmarsh said:

I'm tempted to verify how much of an effect this makes. I'll hook up a 74HC04 chip, drive a fast-edged square wave into a single inverter and tie the rest of the inputs to +5V. I'll measure one of the "low" outputs with a scope, and I'll start tying the rest of the low outputs to ground and look for a difference.

Now, If ground bounce is a big concern in your designs, I hope you're using "just fast enough" logic in TSSOP packages decoupled with an 0603 SMT ceramic on each side. :D

Hi

The groundbounce depends on Ldi/dt. The better the external decoupling, the higher di/dt may develop......

cheers
 
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