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Old 14th February 2005, 08:24 PM   #41
Lourens is offline Lourens  Europe
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Default Dr. Jocko's recipe........

Quote:
Originally posted by Jocko Homo
That one works best if you use a zobel. You would put 75R in series with the right value cap (around 18-47 pF, depending on the transformer) across the output pins.
Hi Jocko,

I know Zobels only from loudspeaker crossovers, sorry.... Could you please elaborate a bit in this digital context?
We are talking about the "Simplest TTL to S/PDIF coax interface" in the ePanorama listing, right? That one is identical to the one I stumbled across spending hours reading numorous S/PDIF threads on this forum. That's the one i implemented in my Philips transport and later in the Studer...... How does this look like with Zobel?

BTW your postings were the main reason to keep on reading. Funny, and very educating for an amateur like me.

Lourens
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Old 14th February 2005, 09:02 PM   #42
Lourens is offline Lourens  Europe
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Default flip-flopping

Quote:
Originally posted by Jocko Homo
Yes, there are other variations, but all of those will add jitter.

The one that uses both ouptuts from a D flip-flop is the worst one around.

OK........not as bad as the stock output in Philips CDPs.
At the risk drifting off topic: What do you think I should do to minimize jitter in the Studer S/PDIF variation (see attachment in # 39, above)?
Don't tell me the line driver is a D flip-flop too
It's one of those puzzles I encounter studying different versions of S/PDIF circuits. The CDD882 transport uses 74LS08 as a buffer. The nearly identical CD880 (CDP-version) 74HC74....
The logic diagrams in the datasheets of those D flip-flops look quite different in my (laymans) eyes, compared to the one I found of the AM26LS31C. As i wrote before, I intend to feed it with some nice shunt food; will that do any good? But I can pull it out or replace it easily (IC's are not soldered in the Studer) if that cures the patient

Lourens
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Old 14th February 2005, 11:58 PM   #43
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Default One thing at a time............

Zobel networks.........

They work the same way here. It cancels out the leakage inductance of the transformer, to make the source look resistive.

On that subject........do not use the 2:1 (or 1:2) versions. Yeah, I know Scientific Conversions tells us how good theirs are.............

Ask them how low their leakage inductance is. Guess what: they won't tell you. Hard to make a zobel without knowing that. So, you have to improvise ways of measuring it.

Jocko
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Old 15th February 2005, 05:57 AM   #44
tubenut is offline tubenut  South Africa
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Quote:
First some questions:
What DAC did you use?
Does this Theta has 'Philips inside' or....?
My DAC is a DS Pro Basic II, PCM57 or 67 DAC chips (18 bit, 2, running balanced line) CS8412 input reciver and a clock crystal around 28 Mhz.
The Transport the Theta Data Basic II, Philips CDM9 pro on a little Philips PCB to do motor and swing arm servo functions but everything else is done on a Theta designed/made PCB but full of Philips chips.

Quote:
Best option for you however is to slave the Theta to the word clock of your DAC
The 28.xxx Mhz clock inside the DAC is not a full multiple of the 11.2896 Mhz clock inside my drive so I am not sure how to go about this..... It actually works out to about 2.5 x 11.2896......

Quote:
I do have the Paul Miller review and follow up by Mike Bearn, but no scanner. Will try to get it scanned for you one of these days.
My friend would be very grateful. The jitter reduction spec for toslink, does it refer to overall improvement on best from the CDP or toslink vs output of the TLC? Ie no point in improving on something that is inferior to what you already have.....
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Old 15th February 2005, 06:27 AM   #45
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Quote:
The 28.xxx Mhz clock inside the DAC is not a full multiple of the 11.2896 Mhz clock inside my drive

Reclock the DAC inputs at 28MHz?
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Old 15th February 2005, 09:07 PM   #46
Lourens is offline Lourens  Europe
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Default From how? to: why.....?

Quote:
Originally posted by tubenut
Quote: Best option for you however is to slave the Theta to the word clock of your DAC

The 28.xxx Mhz clock inside the DAC is not a full multiple of the 11.2896 Mhz clock inside my drive so I am not sure how to go about this..... It actually works out to about 2.5 x 11.2896......
Well, I was aware of the fact this route is no sinecure (hence the smiley -- left out in your quote...). Time to get back to the question you started this thread with. Why should we add an AES3 output in the first place?

In some cases I preferred AES3 (for instance between Levinson’s 390S -- 360S) in other cases S/PDIF (Studer A727 -- Weiss Medea). Both top of the bill combinations, up till now only outdone when the transport could be slaved (like my A727 -- dCS) in which case the interface (=format+cable quality) really becomes secondary, IMHO.
Controlling the transport word clock from the DAC means you tackle one of the key problems with S/PDIF (and AES3, which is essentially the same format) in a much more fundamental way. Read this interesting TNT crash course and you know what I mean.
Synchronising word clocks has a far greater impact than switching from S/PDIF to AES3, in my experience.....

Lourens
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Old 15th February 2005, 09:34 PM   #47
Lourens is offline Lourens  Europe
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Default Re: One thing at a time............

Quote:
Originally posted by Jocko Homo
Zobel networks.........
Thanks Jocko,
How about those other things, improving the "Simplest TTL to S/PDIF coax interface" aka "your recipe", and reducing jitter on the A727 dig out, if any .....
You made me curious, and want to learn!

Lourens
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Old 16th February 2005, 05:21 AM   #48
tubenut is offline tubenut  South Africa
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Default Re: From how? to: why.....?

Quote:
Originally posted by Lourens


Well, I was aware of the fact this route is no sinecure (hence the smiley -- left out in your quote...). Time to get back to the question you started this thread with. Why should we add an AES3 output in the first place?

In some cases I preferred AES3 (for instance between Levinson’s 390S -- 360S) in other cases S/PDIF (Studer A727 -- Weiss Medea). Both top of the bill combinations, up till now only outdone when the transport could be slaved (like my A727 -- dCS) in which case the interface (=format+cable quality) really becomes secondary, IMHO.

Synchronising word clocks has a far greater impact than switching from S/PDIF to AES3, in my experience.....

Lourens
I can believe this quite easily. The difference between AES vs Co Ax are not that huge when using same brand / quality (but correct type for each) cable. For now I prefer my AES3. implementation and am glad I went through the trouble. I have heard the benefit of slave clocking on Deltec and Arcam products. Last night I lead taped the crystal and then covered it in amalgamating tape as well as earthed the can, that made a nice difference. Now I need to look at slave clocking or a better clock but I think the Theta uses something more then the standard Pierce circuit already.... 68nf and 22nf on the crystal and they do not seem to go to earth.... Where can I read some good info on slave clocking and how people have done it DIY?
Anyway this is off topic now......
The discussions have been good and informative.
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Old 16th February 2005, 07:45 AM   #49
Lourens is offline Lourens  Europe
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Default off topic

Quote:
Originally posted by tubenut
Where can I read some good info on slave clocking and how people have done it DIY?
You could contact Guido Tent or check out this website on his so-called TentLink mode. He's a nice and competent guy.

PS I'll send you a pm as soon as i scanned the Paul Miller article on jitter busters!

Good luck,
Lourens
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