How to build a DAC using CS8416+AD1865N-K, with reclocking

[Tuliman]

Hello everybody,
I intend to build a DAC using the CS8416 receiver and the AD1865N-K; the problem is that i don't have that much experience with DAC's, so I can't "design" a schematic for this particullar combination; I have lots of diy dac projects others have buildt, but not in this configuration.

So, starting with an IDE CD-ROM, the CS8416 receiver, this solution for the data management part:
http://www.rockna-line.com/diy/dac/dac.htm
based on 6 74HCT164, maybe the same reclocking, with PLL1705.

...the AD1865N-K (I have 2 of those), and I'm not sure yet what to use for the reclocking???

The output, will be with AD829, or with tubes.

Thank you,
Florin

[bigparsnip]

Hi, from what I understand abou the CS8416 is that it will look after all of your recolocking for you. As providing you get a good clean power supply for the PLL it will producew a very low jitter cignal clock just from your input data signal (it only uses the input clock signal to obtain an initial lock onto the signal's clock or when it loses a lock from the input, although I from memory you can force it to output this clock as well if you use it in software mode).

Plus, I may just be being stupid here, but what exatcly are all those 74HCT164's doing, froma first guess all they will do is to delay the input signal by some small amount right?

[josiphal]

To Tuliman:

If you want DAC for CD-ROM only, try to find I2S lines inside CD-ROM and connect it direct with TDA1543. Don't know about CS8416 receiver, most people use AD1865 with CS8412.

To bigparsnip:

AD1892 output (default) format is 20-bit I2S, but AD1865 work with 18-bit MSB first (not I2S). 74HCT164's are for conversion from 20-bit I2S to 18-bit MSB first.

Josip

[rfbrw]

Originally posted by josiphal

To bigparsnip:

AD1892 output (default) format is 20-bit I2S, but AD1865 work with 18-bit MSB first (not I2S). 74HCT164's are for conversion from 20-bit I2S to 18-bit MSB first.

Josip

All the formats offered by the AD1892 are MSB first and truncating 2 LSB's can be done with a lot less than 6 '164 packages. Only the first two packages are needed to turn 20bit I2S data into 18bit right-justified data.
The remaining '164 shift registers delay the left channel such that it is simultaneous with the right channel. The AD1865 is a simultaneous input device and a digital filter would normally split the data into two simultaneous channels.

[Tuliman]

Thank you all, very usefull the info regarding the HCT164's
Ok, can I use both of the AD1865 in this project? I have seen many dac projects using multiple TDA dac chips for better performance, does this apply too to my dac chip?

[rfbrw]

Originally posted by Tuliman
Thank you all, very usefull the info regarding the HCT164's
Ok, can I use both of the AD1865 in this project? I have seen many dac projects using multiple TDA dac chips for better performance, does this apply too to my dac chip?

You can put them in parallel.

[jean-paul]

Or you can build 2 DACs with them that sound both better than a DAC with paralleled chips.....

[rfbrw]

Better still disregard all opinions and listen for yourself.

[finneybear]

Or even better: Build two DACs, one for each channel, each DAC has two 1865s in parallel, then does not matter how it sounds, you will always have the bragging right. This is exactly what I plan do with the 4 PCM1794 chips I have. Hehe

[rfbrw]

Originally posted by finneybear
Or even better: Build two DACs, one for each channel, each DAC has two 1865s in parallel, then does not matter how it sounds, you will always have the bragging right. This is exactly what I plan do with the 4 PCM1794 chips I have. Hehe

You'll need a bit more than 4 dacs to claim bragging rights around here.