Any feedback on new CS8421 high-res ASRC?

[Wodgy]

There haven't been any threads about Cirrus/Crystal's new CS8421 high-resolution ASRC, so I thought I'd start one.

This looks like a very impressive part. 175dB dynamic range and the ability to output 32 bit PCM data. Naturally there isn't a serious use for 32 bit PCM unless you're doing DSP work, but this suggests that the part's internal arithmetic is relatively high precision.

The specs of this part are better than TI/Burr-Brown's SRC4192 (which is rumored to have problems in its current first revision) and better than the AD1896.

Does anyone have any experience using this part yet?

[Terry_Demol]

Originally posted by Wodgy
There haven't been any threads about Cirrus/Crystal's new CS8421 high-resolution ASRC, so I thought I'd start one.

This looks like a very impressive part. 175dB dynamic range and the ability to output 32 bit PCM data. Naturally there isn't a serious use for 32 bit PCM unless you're doing DSP work, but this suggests that the part's internal arithmetic is relatively high precision.

The specs of this part are better than TI/Burr-Brown's SRC4192 (which is rumored to have problems in its current first revision) and better than the AD1896.

Does anyone have any experience using this part yet?

I was wondering when someone was going to spot that
little puppy!

What would be helpful is a plot of internal jitter rejection
low pass function. TI didn't specify this either.

I'll see if I can get some info out of Cirrus WRT this.

ASRC's are definately coming of age that's for sure.
I wish they could get their act together WRT ADC chips
which appear to be the comparative weakest link in chain
and that's the place where a bit more DR would come in
handy.

Cheers,

Terry

[Wodgy]

Originally posted by Terry_Demol
[B]What would be helpful is a plot of internal jitter rejection
low pass function. TI didn't specify this either.[B]

I've heard that the current revision of the TI's part has relatively poor internal jitter rejection, despite the claim on the first page of the datasheet. It would be great to see actual measurements though. (Apparently TI may also be working on a revision "B" of the SRC4192.)

I'll see if I can get some info out of Cirrus WRT this.

Let us know what you find out. I'd love to see that info.

[gmarsh]

I thought about using it in a new DAC project i'm working on - it's a cheap chip with incredible specs. I chose an AD1896 instead, based on:

- you can't buy the CS8421 anywhere (yet)
- the 2.5V supply requires a separate LDO + capacitors + etc, which take up board space and increase the implemented price of the chip.
- no digital PLL / jitter rejection data is available.

Hopefully issues #1 and #3 will fix themselves soon. If I had 2.5V already on the board, I wouldn't care as much about #2.

[rlim]

Just noticed that the cs8421's stopband attenuation of -125db is not as great as the src4192's -140db. Not sure if that means anything though.....

Richard

[JohnW]

Hi,

I can’t comment on the CS8421 but lets hope it sounds better then the earlier CS8420 - which sounds truly terrible - I used on an Digital amplifier Eval board - where it could be "bypassed" it’s a really lousy sounding device – completely collapses / compresses the sound stage, destroys LF rhythm….

After my experience of CS8420 SRC, I’m very weary of any SRC – although I’m designing a product that uses the Ti device – although it can be bypassed when the unit is Clock-Locked to a transport – it will be interesting to compare both modes of operation.

John

[Terry Demol]

Originally posted by gmarsh
I thought about using it in a new DAC project i'm working on - it's a cheap chip with incredible specs. I chose an AD1896 instead, based on:

- you can't buy the CS8421 anywhere (yet)
- the 2.5V supply requires a separate LDO + capacitors + etc, which take up board space and increase the implemented price of the chip.
- no digital PLL / jitter rejection data is available.

Hopefully issues #1 and #3 will fix themselves soon. If I had 2.5V already on the board, I wouldn't care as much about #2.

No reply yet from Crystal application engineers WRT jitter rejection
LPF corner frequency of CS8421

I'll try again in a few days.

Cheers,

Terry

[Bruno Putzeys]

For what it's worth:

Preamble
An asynchronous SRC (and I mean *any* asynchronous SRC) always sees two sources of jitter at its input. One is the jitter of the input signal itself, which is what people have in mind when they expect an SRC to solve it. The second is jitter caused by resampling the input clock to its master clock (which may be linked to the output frequency or even a third clock source, in which case the output sampling frequency will be a second source of such errors). The SRC "sees" the input sampling rate only in intervals dictated by its master clock. In most realistic cases this jitter source will actually dominate.

Jitter and PLL modes
The TI SRC4192 has several PLL settings among which it chooses depending on the amount of jitter present on the input. For normally low amounts (anything we'd practically encounter) of jitter, it has a narrow mode where the ratio estimation register is updated only once every few seconds. This means that between updates the conversion factor is held absolutely constant (ie it operates like a synchronous src), and none of the input jitter makes it to the output at all.
If the jitter is too high for the input fifo to hold it (this fifo is rather short because delay was a design criterion), the PLL reverts to a more traditional mode of operation and the chip will indeed encode the input jitter (albeit attenuated) into the output signal as phase modulation of the audio.

I haven't actually measured the CS8421. However, I find graphs like 24b (see data sheet) telling. There are clear side bands around the test signal. This clearly shows leftovers from the quantisation effect described in the preamble.
By its trick of sampling every few (say 4) seconds, the TI chip insures all of these effects are relegated to an area 0.125Hz wide (where they are arguably quite innocuous), whereas the CS8421 has only a lowpass filter and does pass jitter up to significant frequencies. Since this jitter was actually only created by the SRC process itself, you may actually be worse off after SRC than before.

Filtering
Another point of interest is the filtering. The CS8421 shows some minor images in some of the FFT graphs, but on the other hand has pretty much no inband ripple (and hence less pre- and post-echos) than does the SRC4192. It seems someone has heard my (and other people's) pleas for better inband behaviour, which at this level of performance is probably more important than a minor outband spur.

Interpolation
The actual interpolation process appears to be impeccable on both chips, none of them showing any interpolation related spuriae.

Conclusion?
The CS8421 just misses the mark due to the passing of newly created jitter (again something all ASRCs have to contend with, but something which the TI chip addresses elegantly).
The gripe I have with the TI chip is its inband ripple.
Up to you to pick which you think Hz least.

Cheers,

Bruno

[zinsula]

Bruno, how do you see the Analog Devices AD1896 in this "contest"?

Thanks for any enlightenment!

Ciao, Tino

[Bruno Putzeys]

The 1896 has a bit of everything: foldback, interpolation errors and jitter pass-through. I was lucky the SRC4192 came round when I started my DAC project.

I suppose in the end it'll be like dacs, op amps and mosfet drivers... best to roll yer own...