Hi,
I have gone through the whole AD1896 datasheet but still cannot undersatnd how can one control this little thing to do all sort of oversampling and upsampling.
It seems that AD1896 does not use any control line nor any register, am I missing something very obvious here?
Thanks for your help.
DM
I have gone through the whole AD1896 datasheet but still cannot undersatnd how can one control this little thing to do all sort of oversampling and upsampling.
It seems that AD1896 does not use any control line nor any register, am I missing something very obvious here?
Thanks for your help.
DM
It's a simple, dumb sample rate converter chip... feed it input data at one clock, and feed it an output clock, and it gives you output data at whatever clock you give it.
Want it to upsample? feed it a higher output clock frequency than the input clock frequency. Want it to downsample? feed it a lower output clock.
If you're eager to configure something, you can always use a SRC4193
Want it to upsample? feed it a higher output clock frequency than the input clock frequency. Want it to downsample? feed it a lower output clock.
If you're eager to configure something, you can always use a SRC4193
You can configure quite a bit:
Output data word length 16 - 18 - 20 - 24 bit, Left / I2S / Right justified.The same goes for the input. See page 22 of the data sheet.
Regarding the clock frequency, you just have to pay attention that the master clock has to be at least 138 times greater than
the maximum input or output sample rate.
This is a VERY versatile piece! Just RTFDS
Ciao, Tino
Output data word length 16 - 18 - 20 - 24 bit, Left / I2S / Right justified.The same goes for the input. See page 22 of the data sheet.
Regarding the clock frequency, you just have to pay attention that the master clock has to be at least 138 times greater than
the maximum input or output sample rate.
This is a VERY versatile piece! Just RTFDS
Ciao, Tino
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