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#1 |
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diyAudio Member
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I am using a PIC16F877A to control the TI PGA2310 device.
Right now, when I increase or decrease the volume, I can see the waveform grow or shrink on the scope, however when I stop changing the volume, the output immediately drops to zero. Every now and then it "sticks" and the output stays on as it should, but most of the time I can only see an output waveform when the volume is actually being changed. Does anyone have any experience or a possible explanation/solution? Any help would be greatly appreciated. Thanks. Brian |
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#2 |
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diyAudio Member
Join Date: Jan 2004
Location: LYON
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maybe the mute pin is not well connected ?
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#3 |
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diyAudio Member
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The mute pin is connected properly.
The strange thing is that the signal level is changing correctly as the volume is increased or decreased, but the output is only visible while it is being changed. Brian |
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#4 |
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diyAudio Member
Join Date: Jan 2004
Location: Discovery Bay, Prague, Paris...
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Hi Brian,
Maybe a silly question, but are you sure you have correctly connected the PSU to the PGA - I've seen situations where the power pins to CMOS logic have been left unconnected, but the logic gates still "function" by optaining there power from the "Inputs" via the internal static protection diodes.. John
__________________
Life shouldn’t be take it too seriously, you will not come out alive anyway… |
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#5 |
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diyAudio Member
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also -- make sure that your scope is DC coupling the signal if you are using a DC source -- I was using a DAC for a slowly increasing signal one time and forgot to make the switch.
Also -- make sure that the power supply ground is properly connected -- make sure that your scope and the DUT are on the same power line. |
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#6 |
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diyAudio Member
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The power supply is properly connected and I have been using a 1kHz sinusoidal source.
I'm wondering if maybe it's an issue with the timing and setting and clearing the CS'- I'm using a PIC @ 4 MHz. Brian |
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#7 | |
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diyAudio Member
Join Date: May 2003
Location: Berlin
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Can you rule out between a hard- or software reason?
That would make digging into a certain direction much easier... I try to make some shots into the dark: - On page 7 of the PGA2310 datasheet, they say: "On power up, all internal fli-flops are reset. The gain byte value for both left and right channel are set to 00hex, or mute condition." Sounds exactly like your problem description. Do you send a reset or interrupt power after ending the programming cycle? Are you sure you don't? ![]() - On page 8, the timing of the programming cycle is described. Does your problem occur just after you latch /CS back up? If so, do you probably shift a couple of bits too few or too many into the PGA? Maybe the relation between rising and falling clock edge also plays a role here? - On page 9, the calculation of the volume setting is described. It goes: "For N=0: Mute Condition. The input multiplexer is connected to analog ground". Do you perhaps accidentally transmit some more zeroes when you actually want to end the programming of the intended volume? - On page 11, the mute functionality is described. Of course you know there are two ways of affecting the mute behaviour, pin 8 and a zero volume (as mentioned). Are you sure you handle both correctly at the same time? E.g. not forgetting the mute pin when unmuting via software? Quote:
To my understanding, a volume change is a whole programming cycle (16 bits). So inbetween those programming cycles the output doesn't mute, but after you stopped clocking in bits, you get problems. Do you latch up /CS inbetween those changes? If so, how much time passes between /CS latched up and signal loss? I'd say, going deeper into your application would require debugging both your hard- and your software. I would be happy if you sent me schematic, layout and sourcecode ![]() Ciao, Sebastian. |
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#8 |
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diyAudio Member
Join Date: Aug 2001
Location: Bath, UK
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Brian,
Have you tried scoping the SPI control bus to check signal timing? My guess is that you're raising CS' before the last bit is clocked in. The signal timing section of the datasheet shows that there is a minimum time of 35n between SCLK falling on the last bit to CS' rising (listed as Tcfcs). I had a different problem controlling my PGA2310 and I attached a scope plot showing the SPI timing in this thread: Problem controlling a PGA2310 As a follow up to that thread, I replaced the offending PGA2310 and everything working fine. Faulty parts are rare these days but they still occur… Nice one, David. |
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#9 |
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diyAudio Member
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I tried everyone's suggestions, but I am still having the same trouble.
Sebastian- can I email you the schematic/source code if you wouldn't mind taking a quick look? Thanks. Brian |
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#10 |
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diyAudio Member
Join Date: May 2003
Location: Berlin
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I don't mind
![]() But I can't promise to be of much help! Seriously! Why don't you post it on the forum, e.g. as a zip file? It's probably no specific problem of the PGA or the PIC. And I'm not an expert in electronic design... so others should have a look, too. Anyways, You can find my email adress at http://www.informatik.hu-berlin.de/~kraus. Ciao, Sebastian. |
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