which clock used in delta-sigma modulator for cs43122?

[rlim]

I would like to know which clock (mclk or sclk) is used to clock the delta-sigma modulators and DAC analog blocks. I couldn't really figure it out after reading the white paper. It is clear that mclk is used to clock the ALU engine, but is this clock also used to clock the modulators and DAC? Of is sclk used instead? I am basically trying to generate the best clock for the modulators and DAC analog blocks, and hence need to know which (sclk or mclk) is being used.

Thanks,
Richard

[Elso Kwak]

Originally posted by rlim
I would like to know which clock (mclk or sclk) is used to clock the delta-sigma modulators and DAC analog blocks. I couldn't really figure it out after reading the white paper. It is clear that mclk is used to clock the ALU engine, but is this clock also used to clock the modulators and DAC? Of is sclk used instead? I am basically trying to generate the best clock for the modulators and DAC analog blocks, and hence need to know which (sclk or mclk) is being used.

Thanks,
Richard

Hi Richard,
My best guess is the masterclock(mclk)
When I still had an Audio Alchemy DDEv 1.1 with Delta Sigma DAC I changed the clock in the transport. And guess what, I could measure the supersonic noise, above 20kHz with a voltmeter.
With my low jitter clock it was 1V lower on the 1.5V!