Regulators for digital circuits

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Inductive part of impedance

Jason, when would it be possible to include more images in one post ? ;)
 

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was just looking through this thread again as it has some great info.

those latest impedance plots look fantastic. i wonder if large-value SMT ceramics are the way to go. how about those Specialty Polymer electrolytics, like the Panasonics? any idea how those would perform?

i am thinking of building a SACD player based on parts from a Sony changer so i am definitely into power supply optimization techniques for digital and mixed-signal supplies. i am probably stuck with the stock Sony digital board, which has all the transport and DSD processing stuff, but the DAC/analog stages are up for grabs.
 
Haven't had enough time to simulate ths SP Caps, but at first glance, they seem to have a (not much) larger capacitance than ceramics, but sure it's worth a try, despite the cost of these SP caps ;)

I'm currently finishing some test PCBs to be able to compare the different decoupling schemes.

Basically, I'll try to monitor the voltage before and after a 78L05 V reg supplying a HC393 counter (SO Package) fed by a 50 MHz clock. As I have no access to impedance meter or network analyzer, I won't be able to speak about impedance curves. But I will measure supply noise with a 2GHz spectrum analyser with different caps/chokes/coils combination. Stay tuned, but I have to find the time to do it.... In a week or two...
 
lowest esr caps

Thanks to ftorres for the enlightening simulations.

Some years ago, I measured a similar doublet with
47uF smt tantalum and 22nF 0603 X7R ceramic.
The peak that you found in your simulation with the
100uF Rubycon did not appear. With the smt tantalum
the "trough" was flat until a few MHz before the
22nF resonates at around 11MHz. So with a smt tantalum
you could probably reduce that back to a triplet.

The lowest ESR hi-value caps that I hv come across
are the AO series from Kemet and the Poscaps from
Sanyo. Both these can be operated AT the rated voltage,
no derating required. Also, if the voltage across them
exceeds rating for an extended period, they do not
catch fire, just some smoke and an open ckt results.
Both are polymer tantalum types. Off the top of my head,
the Kemet ones for 47uF weighs in at about 30milli ohm
ESR. These are both smt types.

If you want to prevent noise from getting into your
supply lines, you could also use 3-terminal caps which are
a sort of straight wire with a built-in filter capacitance.
These are available in the
Murata website below. (lots of emi simulation help too).
http://www.murata.com/emc/product/chip_idx.html
Look under Chip Solid "emifil".

Keep up the great info flow foks.

Yv
 
Yves, (French firstname, french man ?)

Thanks for your comments.
Some years ago, I measured a similar doublet with 47uF smt tantalum and 22nF 0603 X7R ceramic.The peak that you found in your simulation with the 100uF Rubycon did not appear. With the smt tantalum the "trough" was flat until a few MHz before the 22nF resonates at around 11MHz. So with a smt tantalum you could probably reduce that back to a triplet.
Simulations I performed are just here as a guideline. Among the little things that worry me is that they don't account for frequency dependance of ESR... And that the ESL values of electrolytic caps are hard to obtain from the main manufacturers :( But I'm gald to see they do not give totally absurd results :)
By the way, what did you use to make your measurements ?

For the moment, I've given up with simulations, and I'd rather make some measurements. As you may have noticed from my previous posts, I can not measure impedance, so I will try to get the frequency spectrum of a digital supply line, before and after a Vreg with different bypassing schemes. But availability problems have reduced my ambitions :( I couldn't get hold of 270nF or 220nF 0612 smt caps, and the higher value I have is 100nF in this package. Same story with PosCaps, but I can manage to test Panasonic SP Caps, Sanyo OS-CON smt, and tantalum smt caps (cannot find the Kermet's AO series here)
If you want to prevent noise from getting into your supply lines, you could also use 3-terminal caps which area sort of straight wire with a built-in filter capacitance. These are available in the Murata website below. (lots of emi simulation help too).
Great minds meet :p. While browsing the site yesterday, I came upon these devices. They look fine (at least 40dB att above 5MHz). I ordered some yesterday, should have them tomorrow. I will compare them with "classical" coils and ferrite chokes (600R@100MHz).

I should have some results to post next week, provided I can have the spectrum analyzer working, and GPIB as well, since display's photographs are not quite gorgeous...

Thanks again for your advice and comments.
 
measurements and simulations

Hi ftorres,

I still believe simulations give a good idea of
first order performance, as you probably know well
enough.
The measurements I made were with a
Agilent (was HP) 8753C network analyser
with matched impedances on pcboards
that were good up to a few GHz. Unfortunately,
they start at 300kHz (Instrument limitation),
but I guess that this may
be ok since the resonances don't become nasty
until above that freq. When I get the time I
will try to make some more new measurements.

Does anyone know what are the nastiest frequencies
that are around in the psu lines and analog ckts?
I would suspect 256x, 512x of 44.1kHz and crystal freqs
are the main culprits

cheers
 
Yves,

Thanks for the infos.
The measurements I made were with a Agilent (was HP) 8753C network analyser with matched impedances on pcboards that were good up to a few GHz
You lucky guy :) Were the matched loads in parallel or in series with the capacitors (sorry for the maybe dumb question, but I'm not familiar with network analyzers and this type of measurement :() ?

Concerning the frequencies, I've got little clues. I couldn't resist to quickly solder a test circuit to see what was awaiting me in front of the spectrum analyzer. Just for memory, the circuit is a 50MHz canned clock driving a 74HC393, thus dividing the clock signal by 8. Clock and HC393 have their own Vreg (L05), each one being fed by a 9V battery, with only common ground. This test circuit was breadboarded in an ugly way (wires everywhere, no ground plane, no SMDs, minimal decoupling), just to see what happens. And I've not been disappointed:p : Looking at the Vcc pin of the 393, there's spikes everywhere, starting from 6.2MHz (50MHz/8) up to 500-600 MHz, with an envelope curve being roughly a gaussian centered around 100-200 MHz...

I've now to wait for the real pcbs to be etched, to get nicer results (at least I hope :) )
 
spikes etc

Hi ftorres,

The loads were actually part of the network analyser
input and output impedances and the measurements
were made with a transmission line that is the same
impedance with the terminations. You can think of
the source as a Thevenin voltage with the same output
impedance as the load that is shunted to ground
with the same impedance. The impedance in this case
is 50 ohms. You can use any other impedance since
the plots are all in dB.
I guess this is one of the priviledges of the job :)

Manufacturers usually like to show off their cap
bypass capabilities with the kind of circuit you tested
with. I am pretty impressed by the low ESR caps in the
market nowadays, good for us that EMI is such a
hot topic.

rgds
 
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