I've searched the forum and the web but was unsuccesful at finding instructions on how to tap i2s. I have a philips cd650. it is currently in non-oversampling mode. I want to use i2s instead of the current SPDIF. What traces to i have to cut, what pins to i have to connect. I assume 3 wires from CDM-2 transport to TDA1541? or is the SA7720 involved?
All i need is a simple: connect this to this, cut this and that.
Thank you!
All i need is a simple: connect this to this, cut this and that.
Thank you!
ok, well its because i followed the instructions on this site:
http://xoomer.virgilio.it/hi_fi/index.htm
its in italian and i didnt understand every word. so your saying, the connections i made for non-oversampling automatically changed my cd player into using i2s?
sorry for the beginner question
http://xoomer.virgilio.it/hi_fi/index.htm
its in italian and i didnt understand every word. so your saying, the connections i made for non-oversampling automatically changed my cd player into using i2s?
sorry for the beginner question
Nope,
I2S is a format for transporting the information between the chips inside. The format does not specify the number of bits or if it is oversampled data or not.
In a standard player:
there is one i2s signal between 7210 and 7220, which is carrying non oversampled data.
there is another i2s signal between 7220 and 1541, which is carrying 4fs data.
What you did with your mod is connecting the i2s signal carrying the non-os data from the source (7210 decoder) to the destination (1541 dac).
An i2s signal consists of a dataline, a clockline and a wordselect line indicating left or right.
So if you want to connect another dac, you can simply connect the three wires again from 7210 to it. So no cuts are needed.
If the other dac is outside the player, you need some buffers.
And there is a limit to what the 7210 can drive. Think two is ok, but with more use some buffers.
Search around here, there is much information to find.
just takes some time...
I2S is a format for transporting the information between the chips inside. The format does not specify the number of bits or if it is oversampled data or not.
In a standard player:
there is one i2s signal between 7210 and 7220, which is carrying non oversampled data.
there is another i2s signal between 7220 and 1541, which is carrying 4fs data.
What you did with your mod is connecting the i2s signal carrying the non-os data from the source (7210 decoder) to the destination (1541 dac).
An i2s signal consists of a dataline, a clockline and a wordselect line indicating left or right.
So if you want to connect another dac, you can simply connect the three wires again from 7210 to it. So no cuts are needed.
If the other dac is outside the player, you need some buffers.
And there is a limit to what the 7210 can drive. Think two is ok, but with more use some buffers.
Search around here, there is much information to find.
just takes some time...
Thanks Guido!
yeah i knew that i2s and non/oversampling were two different things. i just wasnt sure if the mod i followed also used i2s. thanks for the confirmation. no wonder the mod made such a positive improvement to the sound, it also reduced jitter. what kind of wire to you recomend i connect the pins with. right now im using regular wire, should i use some shielded wire, or something appropriate for carrying signal, will it make an appreciable difference?
yeah i knew that i2s and non/oversampling were two different things. i just wasnt sure if the mod i followed also used i2s. thanks for the confirmation. no wonder the mod made such a positive improvement to the sound, it also reduced jitter. what kind of wire to you recomend i connect the pins with. right now im using regular wire, should i use some shielded wire, or something appropriate for carrying signal, will it make an appreciable difference?
Tapping I2S
This is not a trivial job. You have to identify the LRCK, SLCK and MLCK lines as well as the SDATA line. One of these lines is called BICK in some players. Then you have to get these signals, some in a 6 to 12 MHz frequency range off the board without introducing any phase delay. That is, assuming the signals are even available to the outside world and there is no rule saying they must have a separate D/A converter or even use I2S format between the processor and D/A converter.
If there is an S/PDIF output. As long as the signal is in digital format, it should not be compromised. I have just built an AES/EBU - S/PDIF to analog interface for my company and this was fairly easy. I recover 24 Bit 96 KHz I2S audio from the serial stream using a Texas DIR1703 IC. It accepts anything from a 44.1K to 96K signal. Then I send that to a decent quality AKM D/A converter.
I get about .015% THD+N at 96 KHz and .03% at 44.1 KHz. 24 bit resolution is used.
This is not a trivial job. You have to identify the LRCK, SLCK and MLCK lines as well as the SDATA line. One of these lines is called BICK in some players. Then you have to get these signals, some in a 6 to 12 MHz frequency range off the board without introducing any phase delay. That is, assuming the signals are even available to the outside world and there is no rule saying they must have a separate D/A converter or even use I2S format between the processor and D/A converter.
If there is an S/PDIF output. As long as the signal is in digital format, it should not be compromised. I have just built an AES/EBU - S/PDIF to analog interface for my company and this was fairly easy. I recover 24 Bit 96 KHz I2S audio from the serial stream using a Texas DIR1703 IC. It accepts anything from a 44.1K to 96K signal. Then I send that to a decent quality AKM D/A converter.
I get about .015% THD+N at 96 KHz and .03% at 44.1 KHz. 24 bit resolution is used.
The improvement has nothing to do with i2s. It has to do with what kind of signal you feed to the dac (however that is done). Part of the improvement is due to removing the 7220 from the chain, it seems to introduce lots of jitter.
Cant comment on wires etc. I'm just using plain wire between my 650 pcb and my dac (inside the player). But in my case the dac has the master clock, which is returned to the 650 pcb with a small coax cable. Some signal degradation is allowed, since the dac is tolerant to that (fifo).
As for S/PDIF, don't know the dir1703 but i guess it recovers the clock from the spdif signal. Introducing jitter doing that.
As for the signals: with a 7210 the wordlength is 32 bits (16 bit not used). So 64 bits for one stereo sample. Samplerate is 44.1kHz (non-os), therefore BCK is: 64*44.1*1000 = 2.822400 MHz which is the highest frequency in this case.
Search here, there are some post on how to build buffers for i2s.
As for the 650: rebuild the display powersupply on some small veroboard and remove the additional filter pcb on the right. Now you have some space for your own stuff. Search here, pics are
available.
Mmm, have to start building myself again instead of browsing the forum all the time...
Greetings,
Cant comment on wires etc. I'm just using plain wire between my 650 pcb and my dac (inside the player). But in my case the dac has the master clock, which is returned to the 650 pcb with a small coax cable. Some signal degradation is allowed, since the dac is tolerant to that (fifo).
As for S/PDIF, don't know the dir1703 but i guess it recovers the clock from the spdif signal. Introducing jitter doing that.
As for the signals: with a 7210 the wordlength is 32 bits (16 bit not used). So 64 bits for one stereo sample. Samplerate is 44.1kHz (non-os), therefore BCK is: 64*44.1*1000 = 2.822400 MHz which is the highest frequency in this case.
Search here, there are some post on how to build buffers for i2s.
As for the 650: rebuild the display powersupply on some small veroboard and remove the additional filter pcb on the right. Now you have some space for your own stuff. Search here, pics are
available.
Mmm, have to start building myself again instead of browsing the forum all the time...
Greetings,
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