Judging from the TubeDac website, it is inversion done in the digital domain. There are a number of designs available on the web that include this option. It is just the audio datastream inverted prior to entering the dac and before nitpickers chime in I know one is supposed to be added after the inversion but very few bother.
rfbrw said:
I would question the judgment and hearing of anyone who claimed the resulting 1-bit error was insignificant or inaudible.
Doing a simple bit-wise inversion of the data stream results in waveform that is shifted by one bit. All originally positive samples become negative but one bit larger than they should be. Likewise, all originally negative samples become positive but 1 bit smaller than they should be. That one bit offset equals 6 dB of distortion, across the board.
Question away, but the general consensus would seem to be, albeit arrived at through observation, that it does not matter.
I have over time seen many schematics, some high-end and some for professional eqpt priced well into six figures and I have never seen phase inversion excuted to textbook specs. Here are two dacs, no longer in production, that invert phase 'incorrectly'.
http://www.audioasylum.com/images/DDE3.pdf
http://www.passlabs.com/pdf/d1-srv-man.pdf
Considering the serial nature of modern dacs it isn't really surprising that most don't bother with 1 bit addition.
I have over time seen many schematics, some high-end and some for professional eqpt priced well into six figures and I have never seen phase inversion excuted to textbook specs. Here are two dacs, no longer in production, that invert phase 'incorrectly'.
http://www.audioasylum.com/images/DDE3.pdf
http://www.passlabs.com/pdf/d1-srv-man.pdf
Considering the serial nature of modern dacs it isn't really surprising that most don't bother with 1 bit addition.
guido said:
It’s not that simple: there is no such thing as a DC offset in the digital domain. In the analog domain, adding a DC offset is more of less innocuous because every point in the waveform, including zero, is shifted by the offset amount. In the digital domain, adding a bit to each sample will expand one half of the waveform and compress the other. The fact that the offset waveform is symmetrical about one instead of zero means nothing to the DAC: It still considers digital zero to be silence and the natural point of symmetry. To make ones-complement data stream inversion work correctly, you would have to bias the DAC so that an input of –1 resulted in 0 output.
Consider the simplified case of a 4-bit DAC. It has 16 permissible values ranging from –8 to +7, including zero. The left-hand column shows those values as a signed integer. The second column shows the binary representation of those values. The third column shows the ones-complement of these values. The fourth column shows the signed integer representation of the one-complemented values.
-8 1000 0111 +7
-7 1001 0110 +6
-6 1010 0101 +5
-5 1011 0100 +4
-4 1100 0011 +3
-3 1101 0010 +2
-2 1110 0001 +1
-1 1111 0000 +0
+0 0000 1111 -1
+1 0001 1110 -2
+2 0010 1101 -3
+3 0011 1100 -4
+4 0100 1011 -5
+5 0101 1010 -6
+6 0110 1001 -7
+7 0111 1000 -8
Suppose two successive samples have the values +2 and +4. That means the amplitude of the signal sampled doubled between one sample and the next. If we inverted the data stream, using the table above, the successive samples would have the values –3 and –5. The difference is less then double. The reconstructed waveform would be compressed and have a slower rise time than it should.
On the other hand, suppose two successive samples have the values –2 and –4. Again, doubling in amplitude each sample period. The inverted samples would have the values +1 and +3. The difference is more than double. The reconstructed waveform would be expanded and have a faster rise time than it should.
No matter how you slice it, the error amounts to 6dB.
It should come as no surprise to anyone here that the price of a DAC or its presumed "pro" status has no bearing on its quality or whether the designers got everything "right."
jbokelman said:
I am sure that the designers in question are well aware of the error of their ways but they just don't think it matters. If HDCD can sacrifice the LSB of the occasional sample and one particular design can simply truncate the output of the ASRC and still be well regarded, then they can probably be forgiven for thinking that way.
Consider the Tubedac, the dac with which the Chibi mod is associated. At its most basic the digital section consists of the CS8412 and the TDA1543. Add an inverter (or an XOR if you want to add a phase select switch) and you are done. Though the 1 bit addition is simple, the logic overhead is considerable especially if you think the possible gains are questionable. You might as well invert in the analogue domain.
However, I do think if one has gone to the bother of creating a balanced dac, e.g. as shown in the AD1852 datasheet, the 1 bit addition after inversion should be mandatory.
Test Disc
Hi, I have a test disc where the least significant bit is switched on and off and all other bits are off. It is inaudible with the volume wide open. The only thing I hear is noise with the TDA1543 NON-OS. With the AD1865 the switching was on the brink of audible.
What is more of a problem is to get exactly two equal DACs for the positive and inverted audio signal.
Horowitz has a table for two's complement codes. All bits are the exact negative value when inverted, except the lowest.
I abondoned the idea of a balanced DAC as I did not hear imorovement by that technique. If you have a preamp with balanced inputs it may be worthwhile.
Hi, I have a test disc where the least significant bit is switched on and off and all other bits are off. It is inaudible with the volume wide open. The only thing I hear is noise with the TDA1543 NON-OS. With the AD1865 the switching was on the brink of audible.
What is more of a problem is to get exactly two equal DACs for the positive and inverted audio signal.
Horowitz has a table for two's complement codes. All bits are the exact negative value when inverted, except the lowest.
I abondoned the idea of a balanced DAC as I did not hear imorovement by that technique. If you have a preamp with balanced inputs it may be worthwhile.
As I demonstrated with the 4-bit DAC example, a 1-bit shift in the digital domain skews the relationship between successive samples. Unless the DAC is biased by one bit to compensate, that 6dB of distortion is locked into the resulting analog signal.
To verify my contention, I modified the jitterdither program posted by Ulas and looked at the distortion in samples created with twos-compliment negation verses ones-complement inversion. Simple inversion yielded a S/N ratio that was approx. 6dB lower at all signal levels. Of course, with a 16-bit sample at –0dBFS the error adds less than 0.003% noise. That’s probably inaudible. But, at –60dBFS the invert error accounts for 2.5% additional noise.
All designs involve compromise when balancing performance with cost and complexity. The benefit of DIY is that you get to choose the compromises rather than have them forced upon you by a commercial design. If I were to DIY a DAC that required an inverted signal, either for differential operation or to invert absolute phase, I wouldn’t “cheap-out” and use a single inverter. A correct, 16-bit, twos-complement circuit can be done with a dozen 74xx chips or with a single programmable logic array. Come on! This is digital audio and the first word in digital audio is DIGITAL. Who’s afraid of a little glue logic?
To verify my contention, I modified the jitterdither program posted by Ulas and looked at the distortion in samples created with twos-compliment negation verses ones-complement inversion. Simple inversion yielded a S/N ratio that was approx. 6dB lower at all signal levels. Of course, with a 16-bit sample at –0dBFS the error adds less than 0.003% noise. That’s probably inaudible. But, at –60dBFS the invert error accounts for 2.5% additional noise.
All designs involve compromise when balancing performance with cost and complexity. The benefit of DIY is that you get to choose the compromises rather than have them forced upon you by a commercial design. If I were to DIY a DAC that required an inverted signal, either for differential operation or to invert absolute phase, I wouldn’t “cheap-out” and use a single inverter. A correct, 16-bit, twos-complement circuit can be done with a dozen 74xx chips or with a single programmable logic array. Come on! This is digital audio and the first word in digital audio is DIGITAL. Who’s afraid of a little glue logic?
The little glue loggic is a problem for Jitter, ..
and the distortion related to that jitter is what we want to keep smaller than the distortion caused by inverting the 2-complements data stream.
So what will result in more distortion the glue-logic or the inversion?
Isn't there another solution, for example:
inverting the SPDIF-stream, and using 2xCS8412, one receives the normal SPDIF-stream and the other the negated stream. The MCK of one CS8412 could be the master-clock, which also clocks the other CS8412.
Henk
and the distortion related to that jitter is what we want to keep smaller than the distortion caused by inverting the 2-complements data stream.
So what will result in more distortion the glue-logic or the inversion?
Isn't there another solution, for example:
inverting the SPDIF-stream, and using 2xCS8412, one receives the normal SPDIF-stream and the other the negated stream. The MCK of one CS8412 could be the master-clock, which also clocks the other CS8412.
Henk
Re: The little glue loggic is a problem for Jitter, ..
There is one option open to the CS8412 that may not be open to other receivers and is not open to setups that include a digital OS filter. In one of its modes the CS8412 will output LSB first data. This would allow the use of a bit-serial adder and only one bit reversal. Serial adders use less logic than parallel adders.
Calimero said:
There is one option open to the CS8412 that may not be open to other receivers and is not open to setups that include a digital OS filter. In one of its modes the CS8412 will output LSB first data. This would allow the use of a bit-serial adder and only one bit reversal. Serial adders use less logic than parallel adders.
Re: Re: The little glue loggic is a problem for Jitter, ..
rfbrw, a serial adder won’t work for digital audio. With 16-bit samples, the largest negative value is –32768. The twos-complement, +32768, cannot be represented in 16 bits. In fact, the twos-complement of –32768, as represented in 16 bits, is –32768. To correct this anomaly, every sample that equals –32768 after the addition must be changed to +32767.
rfbrw, a serial adder won’t work for digital audio. With 16-bit samples, the largest negative value is –32768. The twos-complement, +32768, cannot be represented in 16 bits. In fact, the twos-complement of –32768, as represented in 16 bits, is –32768. To correct this anomaly, every sample that equals –32768 after the addition must be changed to +32767.
jbokelman said:
i dont see your "less then" / "more than double":
pos neg
DAC DAC
-4 +3
-2 +1
0 -1
2 -3
4 -5
I see steps of 2 on left and right dac. Dont use the value 0 as reference at the inverted dac, -1 is your referencepoint!
There is just an offset of -1 on the inverted dac. You dont loose resolution. If your analogue stage can cope with that, your fine.
E.g. i am using two resistors for i/v conversion to gnd and then a transformer connected at the outputs of the DAC, so not to gnd.
So there is a little DC over the transformers, but just very little.
And after the transformer, no more offset.
I agree it wont work on the neg edge, but how many times you think that happens?
And yes, i got a balanced dac and to keep all happy, it uses 74xx and (acient
) prog. logic. Works fine btwThose who are interested, elektor published a CPLD trialsystem, should be perfect for this task (including last bit fix and taking care of the max value). Dont forget to reclock after it, to get rid of all the jitter
Greetings,
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