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#1 |
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diyAudio Member
Join Date: Jan 2004
Location: Vancouver, BC
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As the title says, how would I go about doing this? The easiet way, I presume, would be to output a SPDIF signal carrying the clock / bit depth / etc. data from the CS1842 receiver chip and send it to the SPDIF input of my sound card (the HDSP 9652). Is there any reason why this wouldn't work?
Here's the card's (not very technical) manual, in PDF format. |
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#2 |
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diyAudio Member
Join Date: Jan 2004
Location: Vancouver, BC
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Hm, no ideas?
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#3 |
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diyAudio Member
Join Date: Jan 2004
Location: Vancouver, BC
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Somebody help a neophyte like me!
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#4 |
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diyAudio Member
Join Date: Feb 2004
Location: Portland, OR
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Check out this link to RME site
I haven't done this but it appears you can do exactly as you plan. -Robert |
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#5 |
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diyAudio Member
Join Date: Oct 2001
Location: .
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First a few words.
1. Consider this schematic a starting point. 2. If I had to do this I would use a CPLD or more likely a FPGA. 3. It is probably unwise to drive 4 inputs with the Q4 output of IC2 without a buffer but I wanted a small image file. 4. Ulas would probably disapprove of my picayune effort. The schematic. |
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