The BORSANAR DAC

[nar]

Hi to everyone here . The project here , me and my friend dreamt of it . Finally we got to something that should work ? and sonically very good ! That's all what we want ...

First , the design is not tested - we are just finalizing schematics .

Basically as you can see nothing very new here - but the DAC works WITHOUT oversampling . That for a better sound , and we let the ear do its own low pass filter

Second , the design should be as simple as possible without compromising sound quality . It should be easy to build by anyone , and that's why you can see no CMS part , every circuitry is at human scale , for better layout reproduction and adaptability .

We decided to use a CS8412 as input receiver , and to trust the SPDIF clock . The signal is then routed to some 74HCXXX to adapt digital data to input compatible words for the 2*PCM1702 , with a current out . The I/V conversion is made by the amazing analog stage found in Mr PASS's D1 . And that's all . No opamp filtering at the output

Objectively , with good measurements on the bench there should be HF garbage , but no oversampling is certainly better for the sound . We wait a lot of this design .

Feedback welcome !

Regards

Anael

I'll post the parts here as they get finalized

[nar]

And here is the schematic of the I:V stage ( unbalanced )

[nar]

And let me take this schematic from an old thread , if the I/V stage is not sophisticated enough for you

[nar]

The layout in. pdf so that it can come out of your printer at the exact scale

[nar]

Note that the 2*IV resistors are for passive conversion only . For the ones who prefer it this way . In the Borsanar the Iout is directly wired to the source of IRF610 on the I/V stage !

[nar]

I had a check of the circuit board vs. schematic , and it seems we have a bug here

The connections of the V+/GND pins of the 74HC164s are inverted , i.e. pin 7 goes to GND instead of V+ and pin 14 goes to V+ instead of GND

We will correct the PCB

Best regards

Anael

PS traces modifications are perhaps important - especially GND planes and voltages distribution . Thanks

[nar]

The .pdf PCB is correct , the numbers 7 and 14 were just interverted on the schematic

Here is the correction

Apologies

Regards

[Guido Tent]

Originally posted by nar

We decided to use a CS8412 as input receiver , and to trust the SPDIF clock . Feedback welcome !

Regards

Anael

I'll post the parts here as they get finalized

Hi

I like simple schematics, though it is nt a goal as such

The jitter at pin 12 (8412) is too high, lower it, your ears will like it

To start, seperate the supply at pin 7 and pin 22, at least by using a ferrite bead in pin 22, and a resistor (say 22 ohm) at pin 7. Better, build a low noise supply for pin 7

Then attack the 8412 loopfilter, by rducing the resistor to 500 ohm, and quadruppling the cap to 220 nF. You may take that even a step further, if you like

Then add a cap (10nF) at pin 20, it is next to pin 19 which puts out 11.2896 MHz. The silicon layout guy at Crystal must have been drunk when he did this.

Why do you use 10k in series from pin 12 ? I like series resistors, but they are missing in the rest of your circuit.

You may want to add ferrite beads in the supply lies rom the other logic as well

succes

[nar]

What do you mean by ferrite beads ? Precisely ?

Regards

Sorry english isn't my first langage

[Guido Tent]

Originally posted by nar
What do you mean by ferrite beads ? Precisely ?

Regards

Sorry english isn't my first langage

Hello Nar,

Ferrite is a material that shows high impedance at high frequencies. A bead is like a drop of that material around a wire. You may read the backgrounds here:

http://www.tentlabs.com/Info/Article...decoupling.pdf

cheers