In Pioneer DV-444 (DVD player) clock supplied from PLL (see picture).
PLL MCLK signal to DAC (PCM1742EK BB) is connected with 16 cm length wire (PCB trace).
Signal in scope (MCLK near PCM1742) looks bad.
Also I want to connect CS4392 (DAC) in parallel. Distance from PLL to CS4392 DAC is about 25cm.
How to transfer MCLK (22MHz) signal to second DAC with minimal additional jitter and minimal distortion?
PLL MCLK signal to DAC (PCM1742EK BB) is connected with 16 cm length wire (PCB trace).
Signal in scope (MCLK near PCM1742) looks bad.
Also I want to connect CS4392 (DAC) in parallel. Distance from PLL to CS4392 DAC is about 25cm.
How to transfer MCLK (22MHz) signal to second DAC with minimal additional jitter and minimal distortion?
Attachments
Connection schematic
Hi,
Thanks for replayes.
When 50 or 75 Ohm terminator is connected to ground at receiver side, it take current.
PLL supply is 3,3V. If logical 1 is 2,5 volt, then current in 50 Ohm terminator will be 50mA.
This amount of current is acceptable for CMOS PLL ?
Hi,
Thanks for replayes.
When 50 or 75 Ohm terminator is connected to ground at receiver side, it take current.
PLL supply is 3,3V. If logical 1 is 2,5 volt, then current in 50 Ohm terminator will be 50mA.
This amount of current is acceptable for CMOS PLL ?
Attachments
If you only intend for the signal to go in one direction, it's perfectly OK to drive from a low impedance and terminate in the characteristic impedance of the cable. This will prevent any reflection.
On dc biased signals, you might find a C-R termination better, or a termination biased to Vcc/2.
On dc biased signals, you might find a C-R termination better, or a termination biased to Vcc/2.
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