I2S system clock (SYSCK) = Xfs?

[Flemming J P]

Hi

I am trying to connect a pcm2707 to a scr4192 where the pcm2707 is going to be master.

The scr4192 needs to know if the RCKI is going to be 128, 256 or 512 x fs.

The pcm2707 has the following I2S outputs: I2S system clock (SYSCK), I2S left/right clock (LRCK), I2S data (DOUT), I2S Bit clock (BCK).

So I figure that the I2S system clock must be 128, 256 or 512 x FS, but which one??? (It doesn't say anything about it the datasheet (I can't find it))

I've even looked at the I2S defination, but couldn't find anything about a I2S system clock.

Question 2:
Does one need to reset the scr4192 after power up or can one just keep the reset pin high?

[Pitch254]

Hi,

First of all: is that the PCM2707PJT by Texas Instr.? Cause I cant find clk outputs on this device.

You need to reset the SRC: make shure the external clock is running and pull down /RST for at least 500 ns. Then release /RST.

The SRC gets the (up)sample ratio from it´s internal rate estimator. Between in and out.

So slave the input to the source. What will be the highest input fs?

What is the needed Fs on the output of the SRC?
Where is the ref clk coming from and what is it´s feq?
Than you know de Fs factor, because the ref. clock may not be higer than 50 mHz