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Old 27th October 2015, 02:49 AM   #1
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Default Which is more susceptible to jitter Multibit or DS dacs

Please all digital gurus settle a disagreement.

Which is more susceptible to jitter Multibit or Delta Sigma converters

Cheers George
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Old 27th October 2015, 04:41 AM   #2
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Multi bit was introduced to get round DS jitter sensitivity.
This paper explains the DS limitations:
http://www.ece.tamu.edu/~spalermo/do..._saad_2012.pdf
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Old 27th October 2015, 05:22 AM   #3
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Jitter noise/errors being introduced depend on the frequency being output by the DAC for the simple reason that the faster the signal's moving (i.e. slewing) the bigger the amplitude error introduced by a timing error.

Since D-S by design outputs a lot of ultrasonic energy (DSD being king of the pile, being only 1bit) that energy has the capability to be 'down-shifted' in frequency by jitter.

As to particular implementations of D-S - the DACs using switched capacitors (has to be those with integrated opamps e.g. Wolfson/Cirrus) are the least jitter-sensitive.
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Old 27th October 2015, 05:55 AM   #4
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Quote:
Originally Posted by davidsrsb View Post
Multi bit was introduced to get round DS jitter sensitivity.
Didn't Multibit come before DS???

And that paper from what I read and can understand, it seem that CT DS is very sensitive to jitter, is CT the type used in audio? If not and they're DT DS are they also sensitive to jitter? More so than ladder multibit dacs?

"However, CT ΔƩ modulators suffer from high sensitivity to clock-jitter"

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Old 27th October 2015, 06:08 AM   #5
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George, David's talking about multibit D-S, not multibit (pure and simple). Multibit D-S uses many fewer bits (max 6, typically 5).

CT type is used wherever there aren't switched-capacitor (i.e. DT - discrete time) output stages. That means any DAC without on-chip opamps. For example ES9018, PCM1794.
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Old 27th October 2015, 06:26 AM   #6
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OK my mistake, let me re-phase my question.
What is more susceptible to jitter, R2R Multibit or Delta Sigma?

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Old 27th October 2015, 06:30 AM   #7
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That question has an easy answer if the D-S is CT (no on-chip opamps). D-S CT is much more susceptible to jitter than multibit (non-D-S).
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Old 27th October 2015, 07:13 AM   #8
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The original R2R DACs are the least sensitive to jitter. Their weaknesses are linearity and cost. None were >16 bit and often less much in practice, with the worst problems at mid scale. Modern multi bit is a compromise, that aims to get the best of DS and the R2Rs
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Old 27th October 2015, 11:08 AM   #9
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Quote:
Originally Posted by davidsrsb View Post
None were >16 bit
And the PCM1704 is what? 14 bit?
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Old 27th October 2015, 12:52 PM   #10
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Default still waiting for jitter listening tests showing <10 ns threshold

https://www.hydrogenaud.io/forums/in...pic=51322&st=0

a lot of the theory assumes white random jitter spectrum for calculations

but in the real world we have quartz oscillators with low passed jitter spectrum

H I F I D U I N O: Clock in Buffalo II DAC

that should mean the highest amplitude jitter products are at small offsets from DAC output spectral components

by the 100kHz + frequencies that would give audible jitter product frequencies with Delta-Sigma shaped noise rising noise components typical quartz based clocks have <-120 dBc phase noise components

Last edited by jcx; 27th October 2015 at 12:56 PM.
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