Upgrading clocks in transport

[Smiffy]

Hi all.
I have a Sony DVP S7000 that I use as a cd transport.
Would improving the master cd clock in it(22.579MHz)improve its ability as a transport?
Many thanks for any advice.
Smiffy

 

[Smiffy]

No one knows?

 

[DF96]

If a question remains unanswered for several days it could mean:
1. nobody knows the answer.
2. almost everybody knows the answer (so a little searching will find it).
3. the question involves a lot of work or detailed knowledge of a particular item and the relevant person or people just happen not to have seen the question.

My understanding is that as a general rule a genuine upgrade of the master clock can improve jitter. Provisos are that the upgrade really is genuine (ham-fisted 'upgrades' can degrade performance - a good clock connected in a bad way is not an improvement), the rest of the circuit is good enough to benefit from the clock improvement, no silly audiophile tweaks are present such as homemade digital interconnects, and that the DAC is good enough to notice the difference. Also, the better the original clock the less it is worth upgrading.

Does this help?

 

[lcsaszar]

The DAC clock is extracted from the SPDIF signal stream and PLL filtered, so I would say the end result is determined by the PLL, not by the transport clock quality. But I would like to hear opinions from others.

 

[Smiffy]

Hi DF96
Yes.Ta for the answer.I think I wrote the no one knows while under the influence of the fiendish alcohol.
Thinking about it I think maybe the clock in the DVP S7000 is pretty good to start with.It seems to be well regarded as a good transport.So all I have done is damp the clocks area with sorbethane.Don't want to risk damaging it.
Smiffy

 

[DF96]

The DAC clock is extracted from the SPDIF signal stream and PLL filtered, so I would say the end result is determined by the PLL, not by the transport clock quality. But I would like to hear opinions from others.

High frequency jitter is removed by the PLL, so the PLL quality matters. Low frequency jitter cannot be removed by the PLL so you have to rely on the quality of the transport clock.