Hi all! Right away I'll have to say this design is very specific and so probably isn't especially useful to any other members, for that I'm sorry! However, I hope this thread can be educational for everyone 🙂
This is one of several PCB designs I've done for a DSP based loudspeaker crossover unit based around the MiniDSP MiniSharc module. The intention of this board is to route multiple input formats over to I2S; controlled by a PIC microcontroller it will form an input selector.
The design takes 4 S/PDIF signals in, 2 from on-board TOSLINK receivers and 2 from external coaxial connectors via pulse transformers (Murata DA101C). These are converted to I2S by the CS8416 chip, the only one of these type of chips I've found which has the input multiplexer accessible in hardware mode.
There is also a CS5351 ADC on the PCB to facilitate connection of analogue sources. The inputs come via the prescribed input filter shown on the device datasheet but with a relay on the front end to switch between 2 stereo sources. These sources are more likely to be MP3 player or TV than real 'Hi-Fi' sources but the connection is certainly desirable.
Thirdly there is an I2S input via an isolator (Si8445) which will allow a USB-I2S module to be hooked into the system without ground noise issues.
These sources are all switched via a pair of 74AC11257 data multiplexers. The only reason for using these instead of 74HC157 devices is because of the much more favourable pin-out, I don't actually need a tri-state output and you can see output is just permanently enabled.
Sources are switched by simple parallel logic control. A SIPO might make things tidier but this control method suits me. The PIC board runs from an isolated supply and so all control signals come via data isolators.
So, a few things to be aware of. MiniSharc does not require or accept a master clock, it always generates this signal itself. Jitter isn't a major concern at this state since the ASRC on the the MiniSharc will take care of this (not running in full master mode) but data integrity should still be as high as possible. This is a 2-layer board which should obviously really be 4 layers, but this is what I'm stuck with, yes it's a compromise but hopefully only a modest one.
My points of concern are with the distribution of I2S signals. Even without a high frequency master clock these are signals with fast rise and fall times. As you can see there are build out resistors before the IDC connector, their value to match a 10-way ribbon cable, but what about the signals on the PCB? I'm working on the assumption that the (intentionally) extremely small distances they travel will make reflections a non-issue? The PCB traces should have an impedance of ~124 Ohms but there's no practical way to add resistors between the devices.
This is my first time using an ADC and I hope the clock scheme is correct. I've just used a 3.3V crystal oscillator running at 24.576MHz and have set the ADC to divide its master clock by 2, this should suit it running at 48kHz sample rate. I couldn't find the input capacitance of the master clock input to the ADC but it should be low enough for oscillator to drive (up to 15pF).
The pulse transformers, sometimes I see these with RC snubbers like you might use on an audio transformer. How might I calculate optimum ones and is there any need for them at all?
There's not much more to it, as far as I can see the design is ready (with a bit of silk-screen adjustment) but maybe there are some helpful improvements I haven't thought of, if not any major mistakes 😱!
Many thanks for looking 🙂
This is one of several PCB designs I've done for a DSP based loudspeaker crossover unit based around the MiniDSP MiniSharc module. The intention of this board is to route multiple input formats over to I2S; controlled by a PIC microcontroller it will form an input selector.
The design takes 4 S/PDIF signals in, 2 from on-board TOSLINK receivers and 2 from external coaxial connectors via pulse transformers (Murata DA101C). These are converted to I2S by the CS8416 chip, the only one of these type of chips I've found which has the input multiplexer accessible in hardware mode.
There is also a CS5351 ADC on the PCB to facilitate connection of analogue sources. The inputs come via the prescribed input filter shown on the device datasheet but with a relay on the front end to switch between 2 stereo sources. These sources are more likely to be MP3 player or TV than real 'Hi-Fi' sources but the connection is certainly desirable.
Thirdly there is an I2S input via an isolator (Si8445) which will allow a USB-I2S module to be hooked into the system without ground noise issues.
These sources are all switched via a pair of 74AC11257 data multiplexers. The only reason for using these instead of 74HC157 devices is because of the much more favourable pin-out, I don't actually need a tri-state output and you can see output is just permanently enabled.
Sources are switched by simple parallel logic control. A SIPO might make things tidier but this control method suits me. The PIC board runs from an isolated supply and so all control signals come via data isolators.
So, a few things to be aware of. MiniSharc does not require or accept a master clock, it always generates this signal itself. Jitter isn't a major concern at this state since the ASRC on the the MiniSharc will take care of this (not running in full master mode) but data integrity should still be as high as possible. This is a 2-layer board which should obviously really be 4 layers, but this is what I'm stuck with, yes it's a compromise but hopefully only a modest one.
My points of concern are with the distribution of I2S signals. Even without a high frequency master clock these are signals with fast rise and fall times. As you can see there are build out resistors before the IDC connector, their value to match a 10-way ribbon cable, but what about the signals on the PCB? I'm working on the assumption that the (intentionally) extremely small distances they travel will make reflections a non-issue? The PCB traces should have an impedance of ~124 Ohms but there's no practical way to add resistors between the devices.
This is my first time using an ADC and I hope the clock scheme is correct. I've just used a 3.3V crystal oscillator running at 24.576MHz and have set the ADC to divide its master clock by 2, this should suit it running at 48kHz sample rate. I couldn't find the input capacitance of the master clock input to the ADC but it should be low enough for oscillator to drive (up to 15pF).
The pulse transformers, sometimes I see these with RC snubbers like you might use on an audio transformer. How might I calculate optimum ones and is there any need for them at all?
There's not much more to it, as far as I can see the design is ready (with a bit of silk-screen adjustment) but maybe there are some helpful improvements I haven't thought of, if not any major mistakes 😱!
Many thanks for looking 🙂
Attachments
Looks like you've done a great job.
The only spot that looked a bit awkward was the power
trace by TR2. Should have gone out, then down at 45 degrees.
What is the minimum size drill your board house supports?
It's hard to get a true degree of scale, but it looks like your
vias could have been smaller. I use 13 mil drill and 20 mil restring
for my vias.
The only spot that looked a bit awkward was the power
trace by TR2. Should have gone out, then down at 45 degrees.
What is the minimum size drill your board house supports?
It's hard to get a true degree of scale, but it looks like your
vias could have been smaller. I use 13 mil drill and 20 mil restring
for my vias.
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You can get reflections from sharp angles in high speed traces.
45 dregees is ok, 90 degrees is no-no. Curved traces are best.
45 dregees is ok, 90 degrees is no-no. Curved traces are best.
You can also move your mounting holes closer to the edge.
I put the silk screen circle to the edge of the board, not the
keep out circle. That could help you out at the bottom left corner.
I put the silk screen circle to the edge of the board, not the
keep out circle. That could help you out at the bottom left corner.
Thanks very much for your input! Sounds promising 🙂
I've tidied up that funny power routing, looks better now.
I can use vias as small as small as 13 mils (OSH Park 2-layer specs) and on this board the smallest are Eagle default of 19.68 mil. I think I see what you're hinting at since I looked at some via inductance calculations and the inductance barely increases by going to the smaller via, but I can parallel an extra one or two on each pad to bring overall connection inductance down. Whether it's worthwhile I'm unsure, maybe on the parts using 10nF de-coupling capacitors or less.
I've now changed the I2S and XTAL traces to be curved. I've seen this on some LVDS video PCBs for surely the same reason of minimising reflections. Always look slightly awkward but no hardship to use them really!
The mounting points are on the same centres as the other PCBs in this design and you're right, in practise there will be plenty of clearance if I use the keepout layer for positioning. Are you concerned about the loss of ground plane at the very bottom corner?
Thanks again 🙂
I've tidied up that funny power routing, looks better now.
I can use vias as small as small as 13 mils (OSH Park 2-layer specs) and on this board the smallest are Eagle default of 19.68 mil. I think I see what you're hinting at since I looked at some via inductance calculations and the inductance barely increases by going to the smaller via, but I can parallel an extra one or two on each pad to bring overall connection inductance down. Whether it's worthwhile I'm unsure, maybe on the parts using 10nF de-coupling capacitors or less.
I've now changed the I2S and XTAL traces to be curved. I've seen this on some LVDS video PCBs for surely the same reason of minimising reflections. Always look slightly awkward but no hardship to use them really!
The mounting points are on the same centres as the other PCBs in this design and you're right, in practise there will be plenty of clearance if I use the keepout layer for positioning. Are you concerned about the loss of ground plane at the very bottom corner?
Thanks again 🙂
I use OSHPark too.
I'll have to dig through EAGLE and see it there is a way to put your own defaults in for the drop down menus. It does get a bit tiring having to type in your own settings all
the time. At least there is cloning....
The smaller vias help when the traces are dense too.
I do use multiple vias when changing layers, particularly on traces that may carry
a little more current.
On my last design, not only did I use all curved traces for the digital signals, I made
all the traces equal length. I have not built it yet, so it remains to be seen if the
effort will be audible...
If you have a reason for the holes to be where they are, it's not a problem,
you have lots of vias tying the top ground plane to the bottom anyway.
But yes, I thought it would look cleaner if the top layer ground plane was not
broken in the corner.
Overall, you should be proud, you've done a great job!
I'll have to dig through EAGLE and see it there is a way to put your own defaults in for the drop down menus. It does get a bit tiring having to type in your own settings all
the time. At least there is cloning....
The smaller vias help when the traces are dense too.
I do use multiple vias when changing layers, particularly on traces that may carry
a little more current.
On my last design, not only did I use all curved traces for the digital signals, I made
all the traces equal length. I have not built it yet, so it remains to be seen if the
effort will be audible...
If you have a reason for the holes to be where they are, it's not a problem,
you have lots of vias tying the top ground plane to the bottom anyway.
But yes, I thought it would look cleaner if the top layer ground plane was not
broken in the corner.
Overall, you should be proud, you've done a great job!
Thanks!
I attach the new rev, not many changes but this has curved I2S traces, uses smaller (14mil) vias in the most space constrained areas and I've changed the ADC analogue front end to handle larger input signals.
The CS5351 datasheet says the full scale peak-to-peak input is 0.56*V Analogue. That's 0.56*5V = 2.8V, /2 = 1.4V, /Root2 = only 1V RMS. The input filter performs no voltage scaling so it would genuinely clip at any level over 1V RMS. Most sources run around 2V RMS (CD Players etc.) so I've added a resistor attenuator at the front end which allows it to handle up to around 2.3V RMS and input impedance is about 17k.
My concern with this is that post-attenuator the signal is very susceptible to induced noise since it is no longer driven from a low impedance. It's only quite a short trace but it's inside a predominantly digital environment so I've also added 4 0V points which could be used to secure a copper RFI shield over the whole analogue section. Not sure it'll be effective against 50Hz EMI from somewhat nearby transformers though.
It'll be interesting to see if your matched length traces provide any benefits. There are certainly applications where it's required, such as RAM to CPU interface on motherboards, but clock skewing can happen on slower lines too, it just represents a smaller percentage of the clock period.
I intentionally only added a top layer ground fill over the analogue section, where the total fill adds guard traces to hopefully minimise crosstalk etc. On the digital sections I thought each trace would be of more consistent impedance if it didn't have varying amounts of ground fill beside it and only had the solid plane underneath it. Most probably the effects are miniscule 😱🙂
I've seen boards where the top layer is covered with unconnected dots of copper. I know it's to do with EMI conformity but what are these unconnected dots actually doing?
I attach the new rev, not many changes but this has curved I2S traces, uses smaller (14mil) vias in the most space constrained areas and I've changed the ADC analogue front end to handle larger input signals.
The CS5351 datasheet says the full scale peak-to-peak input is 0.56*V Analogue. That's 0.56*5V = 2.8V, /2 = 1.4V, /Root2 = only 1V RMS. The input filter performs no voltage scaling so it would genuinely clip at any level over 1V RMS. Most sources run around 2V RMS (CD Players etc.) so I've added a resistor attenuator at the front end which allows it to handle up to around 2.3V RMS and input impedance is about 17k.
My concern with this is that post-attenuator the signal is very susceptible to induced noise since it is no longer driven from a low impedance. It's only quite a short trace but it's inside a predominantly digital environment so I've also added 4 0V points which could be used to secure a copper RFI shield over the whole analogue section. Not sure it'll be effective against 50Hz EMI from somewhat nearby transformers though.
It'll be interesting to see if your matched length traces provide any benefits. There are certainly applications where it's required, such as RAM to CPU interface on motherboards, but clock skewing can happen on slower lines too, it just represents a smaller percentage of the clock period.
I intentionally only added a top layer ground fill over the analogue section, where the total fill adds guard traces to hopefully minimise crosstalk etc. On the digital sections I thought each trace would be of more consistent impedance if it didn't have varying amounts of ground fill beside it and only had the solid plane underneath it. Most probably the effects are miniscule 😱🙂
I've seen boards where the top layer is covered with unconnected dots of copper. I know it's to do with EMI conformity but what are these unconnected dots actually doing?
Attachments
Here we are, a little over a month later, the board is fully assembled!
Mostly operational but a few bugs. Both optical inputs work well and switching between them is fine. Only issue here is port 2, with no optical input connected to it, exhibits oscillation at its output, high frequency (>1MHz) and about 2Vpp. Port 1 is unconditionally stable, staying high when there is no connection. It is hard to probe from the end of the resistor divider at R23+R24, presumably because the way that the X1 scope probe loads it, but the signal is very clear after the buffer IC. At the resistor divider you can see a high level and using AC coupling the frequency can be seen, but after the buffer it is much clearer. I am hoping it is a failed bypass cap (C57) causing the instability, it took a bit of heat to attach to the ground plane. Unless anyone can see any reason this setup would become unstable? R24 and R26 probably aren't strictly required since the 74HCU04 is supposed to be tolerant of inputs above its supply voltage, but can they really be doing any harm?
Another issue is the coaxial inputs, neither of these work! I think I know why this is now. The output from the transformer should be capacitor coupled into
the input to the CS8416, as seen in the schematic for this multiplexer:
S/PDIF 4:1 Receiver/MUX Module
From what I've read the input to the the CS8416 doesn't like the almost zero Ohm impedance to ground at DC that the transformer produces and so needs AC coupling at the secondary as well as the AC coupling at the primary to protect the transformer from saturation. I only wish I knew this, or had prototyped it, beforehand 😱 . Now I can either bodge in the 2 coupling capacitors (best functionality) or remove the transformers (the easier option).
The analogue input works but I'm not getting any luck with switching between the 2 stereo inputs. The voltage at the collector of Q2 changes nicely from 0V to 5V when the corresponding input at the control header is toggled, but the relay doesn't operate. I can't hear any clicking from it either. So it seems as though the contacts are stuck? I just don't know why, and it isn't the first of these small relays I've found won't operate, all 8 on my output buffer board seemed to be stuck but in this case I suspected high current through the contacts had welded the contacts shut (still can't have been much current or for long though). It's definitely the correct pin out and I can measure the coil resistance as about what it says in the data sheet. Anyone had experience with these small relays?
IM03TS - TE CONNECTIVITY / AXICOM - RELAY, DPDT, 5VDC, 2A, THT | Farnell UK
But overall, I think these issues can be resolved without too much fudging and the analogue input performs really quite well 🙂
Mostly operational but a few bugs. Both optical inputs work well and switching between them is fine. Only issue here is port 2, with no optical input connected to it, exhibits oscillation at its output, high frequency (>1MHz) and about 2Vpp. Port 1 is unconditionally stable, staying high when there is no connection. It is hard to probe from the end of the resistor divider at R23+R24, presumably because the way that the X1 scope probe loads it, but the signal is very clear after the buffer IC. At the resistor divider you can see a high level and using AC coupling the frequency can be seen, but after the buffer it is much clearer. I am hoping it is a failed bypass cap (C57) causing the instability, it took a bit of heat to attach to the ground plane. Unless anyone can see any reason this setup would become unstable? R24 and R26 probably aren't strictly required since the 74HCU04 is supposed to be tolerant of inputs above its supply voltage, but can they really be doing any harm?
Another issue is the coaxial inputs, neither of these work! I think I know why this is now. The output from the transformer should be capacitor coupled into
the input to the CS8416, as seen in the schematic for this multiplexer:
S/PDIF 4:1 Receiver/MUX Module
From what I've read the input to the the CS8416 doesn't like the almost zero Ohm impedance to ground at DC that the transformer produces and so needs AC coupling at the secondary as well as the AC coupling at the primary to protect the transformer from saturation. I only wish I knew this, or had prototyped it, beforehand 😱 . Now I can either bodge in the 2 coupling capacitors (best functionality) or remove the transformers (the easier option).
The analogue input works but I'm not getting any luck with switching between the 2 stereo inputs. The voltage at the collector of Q2 changes nicely from 0V to 5V when the corresponding input at the control header is toggled, but the relay doesn't operate. I can't hear any clicking from it either. So it seems as though the contacts are stuck? I just don't know why, and it isn't the first of these small relays I've found won't operate, all 8 on my output buffer board seemed to be stuck but in this case I suspected high current through the contacts had welded the contacts shut (still can't have been much current or for long though). It's definitely the correct pin out and I can measure the coil resistance as about what it says in the data sheet. Anyone had experience with these small relays?
IM03TS - TE CONNECTIVITY / AXICOM - RELAY, DPDT, 5VDC, 2A, THT | Farnell UK
But overall, I think these issues can be resolved without too much fudging and the analogue input performs really quite well 🙂
Attachments
Hi Dr_EM,
That is a nice board! We must have similar system goals as I'm slowly coming across your builds, albeit late to the game. No searches prior to late sept.🙁
I hope you don't mind a couple of questions.
1. Any updates to this? Everything solved?
2. Have you tried the minisharc volume control? Any thoughts?
3. Any trouble using the I2S to sharc?
4. Did you hand solder all that?
Nice work! Must be fun to debug that board!
That is a nice board! We must have similar system goals as I'm slowly coming across your builds, albeit late to the game. No searches prior to late sept.🙁
I hope you don't mind a couple of questions.
1. Any updates to this? Everything solved?
2. Have you tried the minisharc volume control? Any thoughts?
3. Any trouble using the I2S to sharc?
4. Did you hand solder all that?
Nice work! Must be fun to debug that board!
Hi, thanks!
Seems to be a few DSP crossover systems getting built around here at the moment so that's good 🙂
To answer your questions:
1. Nearly solved, adding the capacitor after the transformers fixes the coaxial input issues but it's a tricky mod. You have to lift one end of the transformer and place the 10nF cap under the leg, then remove the 75R surface mount from the rear and put the new one across the transformer pins directly (through hole part). Also change the input cap up to 100nF, otherwise the two 10nF in effective series might be too much low end losses.
The relay I actually replaced before realising these tiny relays are actually polarised! It is not made clear in the datasheet but they must have the DC applied the right way around and unfortunately the PCB is not laid out this way. This might be a difficult mod but I'll come up with something.
2. I haven't used the miniSharc that way since I'm using CS3318 but there's no reason it should be an issue. Digital volume control from the PC source works fine.
3. The miniSharc picked up and ran with all I2S sources I could throw at it. I checked that before designing this board. I used a USB - I2S converter to test, running with Wasapi and a sample rate converter in foobar I could configure the rates any way and verified them on the oscilloscope. Of course no master clock is required here since miniSharc always produces this clock.
4. It's all hand soldered but at a professional re-work facility. Nothing is too difficult on this board, I'm quite careful about ground planes and usually allow the thermal reliefs, smallest passives are 0603 size. The mods are more difficult though.
🙂
Seems to be a few DSP crossover systems getting built around here at the moment so that's good 🙂
To answer your questions:
1. Nearly solved, adding the capacitor after the transformers fixes the coaxial input issues but it's a tricky mod. You have to lift one end of the transformer and place the 10nF cap under the leg, then remove the 75R surface mount from the rear and put the new one across the transformer pins directly (through hole part). Also change the input cap up to 100nF, otherwise the two 10nF in effective series might be too much low end losses.
The relay I actually replaced before realising these tiny relays are actually polarised! It is not made clear in the datasheet but they must have the DC applied the right way around and unfortunately the PCB is not laid out this way. This might be a difficult mod but I'll come up with something.
2. I haven't used the miniSharc that way since I'm using CS3318 but there's no reason it should be an issue. Digital volume control from the PC source works fine.
3. The miniSharc picked up and ran with all I2S sources I could throw at it. I checked that before designing this board. I used a USB - I2S converter to test, running with Wasapi and a sample rate converter in foobar I could configure the rates any way and verified them on the oscilloscope. Of course no master clock is required here since miniSharc always produces this clock.
4. It's all hand soldered but at a professional re-work facility. Nothing is too difficult on this board, I'm quite careful about ground planes and usually allow the thermal reliefs, smallest passives are 0603 size. The mods are more difficult though.
🙂
Thanks for the info. Good to hear there were no problems with the ADC and MCLK from the minisharc. Sounds like a fun mod coming but does seem doable. Good luck and cool project!
You do not get any signal integrity problems with 90 deg corners, this is actually a myth below GHz designs, otherwise it don't make a difference. Think about the 90 degree corner your signal traverses at every via!
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Sorry I missed some links...this has been going on for many years...
Who's Afraid of the Big Bad Bend?
Anyway comments from this article (1996 PCD Magazine)....
"Routing
Orthogonal trace corners should be avoided. The debate rages, but as frequencies and edge rates continue to rise, ninety degree corners introduce excess capacitance and cause a small change in characteristic impedance. This becomes disastrous at high frequencies (e.g. 100 MHz) when electrons virtually fly off the sharp corners of the bend. Forty-five degree turns, with a minimum segment length of twice the trace width, are better. Arced corners, with the inside radius of at least the trace width, are by far the best approach for high-speed signals."
This from an EMC expert.........
EMC Design for High Speed PCB's
Prompted this rather humerous exchange in PCD magazine
OF FLYING ELECTRONS
Also this paper that I cant seem to link to but is on the web, more in depth....
"Right Angle corners on printed circuit board traces, time and frequency domain analysis"
by Mark I Montrose
That said I ALWAYS use 45 degree corners.
Who's Afraid of the Big Bad Bend?
Anyway comments from this article (1996 PCD Magazine)....
"Routing
Orthogonal trace corners should be avoided. The debate rages, but as frequencies and edge rates continue to rise, ninety degree corners introduce excess capacitance and cause a small change in characteristic impedance. This becomes disastrous at high frequencies (e.g. 100 MHz) when electrons virtually fly off the sharp corners of the bend. Forty-five degree turns, with a minimum segment length of twice the trace width, are better. Arced corners, with the inside radius of at least the trace width, are by far the best approach for high-speed signals."
This from an EMC expert.........
EMC Design for High Speed PCB's
Prompted this rather humerous exchange in PCD magazine
OF FLYING ELECTRONS
Also this paper that I cant seem to link to but is on the web, more in depth....
"Right Angle corners on printed circuit board traces, time and frequency domain analysis"
by Mark I Montrose
That said I ALWAYS use 45 degree corners.
Yes, but even that doesn't matter these days, when you look closely at some of the shapes created by traces going into SMD pads you see worse than the old 90 deg corner, as the picture below shows. As SMD devices increased and geometries decreased the manufacturers have made great improvements in etching, it still pays to try and minimise potential problems though. one way that is finding favour is coming out of SMD pads at the corners as the second picture shows. This allows you to minimise the tight complex shapes that have to be etched, like all things there are a couple of old school engineers who don't like this despite explanations as to why it is done and how it does not affect the electronic function of the circuit. To further complicate the problem, what you design of CAD is altered by the PCB manufacturer, the main one being etch compensation, where they enlarge the artwork globally to cater for etch back (the same amount approx. as the thickness of the bare copper used).
As an experiment in 1989 I did a board (mixed technology, mainly 0.1" PTH IC's and some emerging SMD for memory), it was a 3 track between 0.1" IC legs. We decieded to go with 90 deg corners to see what impact it had, the result none. The PCB manufacturers didn't moan and the board passed all electrical and EMC tests...it even ended up as the processor board in this lot (it was the MP302 board).
https://accelconf.web.cern.ch/accelconf/e94/PDF/EPAC1994_1551.PDF
That is the only time I have ever done that, and in that case it was a deliberate experiment. I do always use 45 deg corners as you get more space and the design always looks nicer, with flowing tracks instead of sharp corners.
As an experiment in 1989 I did a board (mixed technology, mainly 0.1" PTH IC's and some emerging SMD for memory), it was a 3 track between 0.1" IC legs. We decieded to go with 90 deg corners to see what impact it had, the result none. The PCB manufacturers didn't moan and the board passed all electrical and EMC tests...it even ended up as the processor board in this lot (it was the MP302 board).
https://accelconf.web.cern.ch/accelconf/e94/PDF/EPAC1994_1551.PDF
That is the only time I have ever done that, and in that case it was a deliberate experiment. I do always use 45 deg corners as you get more space and the design always looks nicer, with flowing tracks instead of sharp corners.
Attachments
Wow, nice Dr_EM!
This is exactly what I need for my SHARC too, well not as many inputs, just an analog, coax and optical (3) would suit my needs.
Good luck with the debugging!
Cheers,
Jeff
This is exactly what I need for my SHARC too, well not as many inputs, just an analog, coax and optical (3) would suit my needs.
Good luck with the debugging!
Cheers,
Jeff
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