Any opinions about my idea to make a class-d amp using MSP430F2132 microcontrollers as PWM generators?
This way there would be good control over the FETs timing.
An opamp could do error integration, and the ~200 ksamples/s A/D converter could read the voltage from integrator and this could be used to adjust the PWM modulator.
I'm planning to use just short pulses when there is no signal instead of full 50/50 duty cycle PWM, to avoid large current in the output filter. This can be done by using separate "compare registers" for each FET.
One MSP430F2132 can do only one channel, so two would be needed for stereo amp.
Simulated FET output stage (100 ns pulses and 10 us interval):
http://hepso.dna.fi/misc/classd/schematic.jpg
http://hepso.dna.fi/misc/classd/waveform.jpg
http://hepso.dna.fi/misc/classd/classd3.asc
The idea here was to use rather small damping resistor, otherwise there was lots of oscillation when both FETs are off. Level shifting is done just with capasitors, and resistors are there to make sure the FETs are not on for very long time in case of error. Some kind of buffer is needed after the mcu.
I thought about using MTP8P10 and MTP8N10 FETs, which are not as fast as i'd like, but could not find anything better in 100 V.
This way there would be good control over the FETs timing.
An opamp could do error integration, and the ~200 ksamples/s A/D converter could read the voltage from integrator and this could be used to adjust the PWM modulator.
I'm planning to use just short pulses when there is no signal instead of full 50/50 duty cycle PWM, to avoid large current in the output filter. This can be done by using separate "compare registers" for each FET.
One MSP430F2132 can do only one channel, so two would be needed for stereo amp.
Simulated FET output stage (100 ns pulses and 10 us interval):
http://hepso.dna.fi/misc/classd/schematic.jpg
http://hepso.dna.fi/misc/classd/waveform.jpg
http://hepso.dna.fi/misc/classd/classd3.asc
The idea here was to use rather small damping resistor, otherwise there was lots of oscillation when both FETs are off. Level shifting is done just with capasitors, and resistors are there to make sure the FETs are not on for very long time in case of error. Some kind of buffer is needed after the mcu.
I thought about using MTP8P10 and MTP8N10 FETs, which are not as fast as i'd like, but could not find anything better in 100 V.
Do you mean MSP430F1232? Have you considered the TMS320C2000 series of DSP's instead? They have are more suited to the job, with a lot of useful peripherals. I have designed some switchers using the 24xx, but not amps (motor drives, which are similar in topology, but not in quality 
). The '28xx series screams at 120 mips and has a very fast A/D. If a micro can do the job, this one can. The cost of tools may be a problem though. Do you already have the '430 tools?
Tony
). The '28xx series screams at 120 mips and has a very fast A/D. If a micro can do the job, this one can. The cost of tools may be a problem though. Do you already have the '430 tools?Tony
I would be interested in seeing how it turns out for you. The concept of using software to computationally reconstruct audio waveforms is beyond the scope of my abilities, so can't help you in that area in any serious way.
Beware of power-on mosfet shoot-through current with capacitor coupled drive of complementary mosfets. An aquaintance blew many a mosfet before arriving at a decent solution. Let me know if you are interested in seeing his answer to that hang-up.
I kicked around the idea of a PWM amp idling with short pulses from each rail, an effect paralleling idle current in a class AB amp. It involves extra circuitry if done linearly, but I think it is worth trying digitally if it is not hard to implement.
Beware of power-on mosfet shoot-through current with capacitor coupled drive of complementary mosfets. An aquaintance blew many a mosfet before arriving at a decent solution. Let me know if you are interested in seeing his answer to that hang-up.
I kicked around the idea of a PWM amp idling with short pulses from each rail, an effect paralleling idle current in a class AB amp. It involves extra circuitry if done linearly, but I think it is worth trying digitally if it is not hard to implement.
Yes, i meant MSP430F1232. I did a soldering iron control with it. There is free development software.
Is there free demo compiler for TMS320F241? It is available as 68 pin PLCC version, that can be used with cheap PLCC socket to get 2.54 mm pin distances.
One possibility would be external 8 bit A/D converter to be able to use normal signal ground as reference level. With MSP430 (or TMS320) i would have to use 1.5V or 2.5V virtual ground for the A/D converter.
Is there any mcu:s that can do bipolar A/D conversion?
I'm not planning a lot of signal processing, just using the A/D value directly for PWM control value sounds enough.
Is there free demo compiler for TMS320F241? It is available as 68 pin PLCC version, that can be used with cheap PLCC socket to get 2.54 mm pin distances.
One possibility would be external 8 bit A/D converter to be able to use normal signal ground as reference level. With MSP430 (or TMS320) i would have to use 1.5V or 2.5V virtual ground for the A/D converter.
Is there any mcu:s that can do bipolar A/D conversion?
I'm not planning a lot of signal processing, just using the A/D value directly for PWM control value sounds enough.
There is a free 30 day trial of code composer, but the demo boards are not free. Check this link:
http://dspvillage.ti.com/docs/catalog/dspplatform/details.jhtml?templateId=5121&path=templatedata/cm/dspdetail/data/vil_getstd_how
I would not think that 8 bits is enough. The on-chip, 10 bit unit is better. With ten bits you get 9 bit signed anyway. I don't recall seeing a bipolar A/D. Everyone offsets to virtual ground.
Perhaps you are better off trying your idea with an MSP if you do not need lots of processing, but have look at the 14X series. They have HW multipliers and 12 bit A/D.
One really good thing about the DSP's is the PDPINT pin, which quickly kills the PWM outputs in hardware (handy for saving your FETs!). The drives I have worked on could withstand a shorted output with no damage to the IGBT's (a bit more rugged than FET's, but you see my point).
Happy designing!
Tony
http://dspvillage.ti.com/docs/catalog/dspplatform/details.jhtml?templateId=5121&path=templatedata/cm/dspdetail/data/vil_getstd_how
PHP:
One possibility would be external 8 bit A/D converter to be able to use normal signal ground as reference level. With MSP430 (or TMS320) i would have to use 1.5V or 2.5V virtual ground for the A/D converter.
PHP:
I'm not planning a lot of signal processing, just using the A/D value directly for PWM control value sounds enough.Perhaps you are better off trying your idea with an MSP if you do not need lots of processing, but have look at the 14X series. They have HW multipliers and 12 bit A/D.
One really good thing about the DSP's is the PDPINT pin, which quickly kills the PWM outputs in hardware (handy for saving your FETs!). The drives I have worked on could withstand a shorted output with no damage to the IGBT's (a bit more rugged than FET's, but you see my point).
Happy designing!
Tony
Generally, MOSFETs are more rugged for a given steady output current rating because they possess a positive temperature coefficient in regard to channel resistance as well as a larger die size for a given current rating, allowing them to dissipate greater instantaneous power without destruction. IGBT's, OTOH, become more conductive from collector to emitter with increasing temperature and may also suffer from thermal runaway in certain cases.
The 8 MHz or 20 Mhz clock might not be enough for small signals... For 100 kHz you get 80 or 200 different pwm outputs, so it is equivalent to only about 8 bits D/A converter. How fast (oversampled) should a 8 bits D/A converter be to generate proper output?
I guess i'll go for analog integrator / comparator / oscillator style.
I guess i'll go for analog integrator / comparator / oscillator style.
If i do negative feedback with analog integrator, isn't it the same as doing noise shaping? It does decrease low frequency noise.
I mean that i integrate the difference between input signal and PWM output (divided by amplification), and do A/D conversion for the result and feed that value into PWM modulator.
That should be easy to do with the TMS320F241. It has five timer compare registers, enough for driving two output stages with individual timing for each FET.
I mean that i integrate the difference between input signal and PWM output (divided by amplification), and do A/D conversion for the result and feed that value into PWM modulator.
That should be easy to do with the TMS320F241. It has five timer compare registers, enough for driving two output stages with individual timing for each FET.
This would indeed be noiseshaping !
This is quite a cool idea from the first glimpse. You'd have to watch out for how much delay is introduced by your A/D converter since this can affect loop stability. Even more since you might have to use more than one single integrator to achieve enough SNR.
Regards
Charles
As switching frequency I would choose one that is an integer multiple of a source's sample rate (maybe even switchable if it should be fed signals from CD, DVD audio etc).
In this case your amp should be able to "swallow" the unfiltered output from an oversampling DAC. But be aware to synchronise properly.
Regards
Charles
In this case your amp should be able to "swallow" the unfiltered output from an oversampling DAC. But be aware to synchronise properly.
Regards
Charles
The normal A/D converters are rather slow, causing about 2 us delay, and it is difficult to find a good time for taking a sample (takes about 500 ns).
Maybe cpu should first do a 10 us PWM cycle and then quickly do A/D conversion before starting to do the next PWM cycle. But 2.5 us or 25% begins to limit the maximum available power.
So i'll use comparator after the integrator and flip between cpu controlled high and low pulses when comparator state changes. This can be done without using virtual ground.
I was also thinking about spread spectrum to avoid possible interference problems, but i do not know much much spreading should i do and how to implement it.
Maybe cpu should first do a 10 us PWM cycle and then quickly do A/D conversion before starting to do the next PWM cycle. But 2.5 us or 25% begins to limit the maximum available power.
So i'll use comparator after the integrator and flip between cpu controlled high and low pulses when comparator state changes. This can be done without using virtual ground.
I was also thinking about spread spectrum to avoid possible interference problems, but i do not know much much spreading should i do and how to implement it.
ukram: You could integrate a complete cycle of your output stage to get a "DC" sample to feed into your A/D converter. Then you can add or subtract the sampled error signal from the main signal to get a correct signal in the next switching cycle.
But then you could also let the integrator do that directly, without the uP. So you spare the A/D converter, adder time delay, quantization noise, and rePWM modulation.
Just a point of view
But then you could also let the integrator do that directly, without the uP. So you spare the A/D converter, adder time delay, quantization noise, and rePWM modulation.
Just a point of view
Tried using Xilinx free software. The XC9536XL CPLD chip is cheap and it is big enough for my simple controller.
It was rather easy to enter a state machine and then just press a few buttons to get a chip that implements it. (I have to make a parallel port adapter for JTAG programming).
One problem with the Xilinx software was that i could not create a project, the program just said "cannot create directory". Then i just modified an example project.
State machine here:
http://hepso.dna.fi/misc/classd/state_machine.jpg
The idea is to use analog integrator + analog comparator with some hysteresis. If there is close to zero voltage, there is rather short positive and negative pulses and 100 clock cycle timeouts. If there is more voltage, only one fet will switch and the circuit is self-oscillating, although still syncronised to clock.
The Xilinx chip can use more than 100 MHz clock, although i think i'll settle for less. How to implement 20-100MHz clock?
It was rather easy to enter a state machine and then just press a few buttons to get a chip that implements it. (I have to make a parallel port adapter for JTAG programming).
One problem with the Xilinx software was that i could not create a project, the program just said "cannot create directory". Then i just modified an example project.
State machine here:
http://hepso.dna.fi/misc/classd/state_machine.jpg
The idea is to use analog integrator + analog comparator with some hysteresis. If there is close to zero voltage, there is rather short positive and negative pulses and 100 clock cycle timeouts. If there is more voltage, only one fet will switch and the circuit is self-oscillating, although still syncronised to clock.
The Xilinx chip can use more than 100 MHz clock, although i think i'll settle for less. How to implement 20-100MHz clock?
Well, here is one simple opamp simulation:
Picture:
http://hepso.dna.fi/misc/classd/classd_opamp_simulation2.jpg
Simulation file:
http://hepso.dna.fi/misc/classd/classd_opamp_simulation2.asc
This could be used as headphone amp...
For "real" version i have been thinking about using this kind of hysteresis feedback for comparator.
Can someone give instructions about the dimensions for 35uH air-core coil? I think i'll try that first.
Here is one that is 10uH according to LC resonance frequency measurement. Used about 2.2m of wire for that, so 33uH takes probably about 5 meters?
Picture:
http://hepso.dna.fi/misc/classd/classd_opamp_simulation2.jpg
Simulation file:
http://hepso.dna.fi/misc/classd/classd_opamp_simulation2.asc
This could be used as headphone amp...
For "real" version i have been thinking about using this kind of hysteresis feedback for comparator.
Can someone give instructions about the dimensions for 35uH air-core coil? I think i'll try that first.
Here is one that is 10uH according to LC resonance frequency measurement. Used about 2.2m of wire for that, so 33uH takes probably about 5 meters?
An externally hosted image should be here but it was not working when we last tested it.
http://hepso.dna.fi/misc/classd/100uH_coil.jpg
Here is 100 uH inductor. I used 10W resistor and wrapped 5m of 0.5mm wire around it. It has about 0.5 ohms dc resistance.
Here is 100 uH inductor. I used 10W resistor and wrapped 5m of 0.5mm wire around it. It has about 0.5 ohms dc resistance.
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