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Old 27th February 2002, 06:45 AM   #11
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Found it !

http://www.alesis-semi.com/products.htm


Check this site for the AL3101.
The multiplier is 28 x 22 producing a 28 bit result. With this you could get a reasonable result.


grtz

Simon
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Old 27th February 2002, 06:16 PM   #12
tiroth is offline tiroth  United States
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Blu_line,

Can you quantify "reasonable" in any way? I am a bit too lazy at the moment to get out Octave and find my undergraduate text on numeric stability, although I probably should. I'm interested in putting together a digital EQ at some point and this IC seems to at least have definable error bounds, unlike TAS3001 which is kind of a black box.

The Alesis 8ch/20-band eq app note lists a usable word length of 18 bits, although I think this could easily be 20 bits with less clip protection. If truncation errors could be held to 2-3 LSB this could be quite nice.

Thanks,
Tyler
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Old 28th February 2002, 06:50 AM   #13
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hmmm, reasonable !?!?!?

At work we use DPS's with 24 bit coeffiecient and 24 bit data path or 12 bit coeffiecient and 24 bit data.
The ALU and multiplier in the last one can produce resp. 36 and 39 bit results.
Rounding / truncation happens after this step, but you can be sure that the ALU and multiplier hold a correct result.

As for the Alesis, 28 x 22 bit would need an alu with an result of 40bit and an multiplier which is around 44 bits.
Since the alesis has just an 28 bit result register, errors are introduced. How big the error is, i can not say.

By scaling the coefficients and data (take 16 or 20 bit data instead of 24 and use 12 bit coeffs instead of 22) the result would be reasonable (we all wish to have the maximum achievable, do we ) but would still be qualified as HIFI
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Old 17th March 2002, 02:38 PM   #14
alvaius is offline alvaius  Canada
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Default Good Luck

I think you have several issues at work here:

1) How will you get digital data into your PIC?? Well, ignore any of the nice ADCs\DACs with I2S, since you will not be able to interface to them unless you put a CPLD outside your part to convert the serial I2S to Parallel such that you can get it into and out of your PIC if you insist on using a PIC (bad idea if you ask me).

2) Ignore all those posts on FFTs, etc. That is not how you do a filter digitally in the real world. I would also forget about doing an FIR filter at audio frequencies on a PIC. It just isn't going to happen. However, a second order IIR filter should be doable. Heck, if you are really good, you may even be able to do 4th order at 44KHz.

3) If you insist on using PICs, stick to the 18C\F series at 40MHz (10 mips). This is as fast as it gets with PICs. The DSPICs will not be available for several months (these are not 18 series as one of the posts stated).

.... or you could save yourself a ton of grief and buy a DSP evaluation board from Motorola (563xx) - 24 bit for easy arithmetic, or ADI (Shark - 32 bit, real easy). These parts have I2S interfaces. In fact, their eval boards have A/D and D/A on them already. Maybe not great quality, but at this point, concentrate on that credit and getting to the PUB. Commercial quality can come later. They are less that $300 and you may even be able to find a promo for a lot less. You can usually get a freeware assembler, debugger, compiler for limited code-space that is more than enough for your requirements.

Hope this helps...
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Old 18th March 2002, 07:20 AM   #15
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thanks Alvaius.

1) The information you supplied was just the sort of information, i was looking for. You say that the PICs are a bad idea, what other microprocessors do you suggest. i am familiar with the PIC and that is why i chose it. From your experience, which would be a better microcontroller for this application. forgive me for my ignorance, but what is a CPLD?

2)Iam going to stay away from FFT's 'cause i don't know much about them, however i do know something about IIR filters. Microchip has an APP. note on IIR filters. Maybe this would be a good place to start.

3)One of the technical guys at our microchip supplier said that the 16f877 should be quick enough for this application. How quick should the PIC be.

4) Hmmm..... $300, considering that i earn +/- $120 a month(student), the evaluation board would have to be out of the question for now. Iwill try to gather more information on the motorola's though.

Any idea on what the sound quality would be like?

Thanks again for all the help.
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Old 18th March 2002, 08:08 PM   #16
alvaius is offline alvaius  Canada
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The 18 series of PICS have better math capability. At 44Ksps stereo, the 16F877 will have about 50 instructions max per sample. That is not much when you need to extend 8 bit math to 16 bits. The 18 series will offer you twice the MIPS. However, I would be far more inclined to drop a DSP down. 56303 or similar from Motorola, a 2185 or similar from ADI, etc. would be so much easier to work with. Given the cost, it sounds like you are not going to be able to do your own PCB, so getting a DSP eval board may not be a bad idea. Eval boards generally have a so-so 16 bit ADC\DAC combo.

I may be able to do something for you.... where are you located (city?).

Of course, you could cheat and use a Cypress PSOC microcontroller that has switch-cap building blocks. Not a digital filter, but much easier (hours to design!).
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Old 20th March 2002, 08:47 AM   #17
hifiZen is offline hifiZen  Canada
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I'd have to agree that the PIC is not a suitable choice. 50 PIC RISC instructions per cycle is nowhere near enough, even on just 8-bit audio data - the simple reason is that the PIC micros do not have hardware multipliers. Thus, you are executing a short program to do one multiply operation. Extending the math to 16 bits only compounds the problem on these little 8-bit processors. PICs were not designed to do math, but instead just to run simple little programs for controlling things, and maybe to do some light math when there's ample time available for it to crunch away for a few thousand instructions.

Frankly, there are very few microcontrollers which will be capable of supporting decent audio filters in realtime. The Motorola 68HC16 might be a candidate to look at, since i believe the CPU16 core includes a 16-bit MAC (Multiply and Accumulate) unit, which is exactly what you need for FIR or IIR filters. A 24-bit MAC with a larger accumulator register would be even better.. but now we're talking real DSPs like the motorola or analog devices chips mentioned in prior posts.

A CPLD (Complex Programmable Logic Device) is is the same thing as an FPGA (Field Programmable Gate Array) - Xilinx calls them FPGAs, and apparently owns a trademark on that acronym, so Altera calls the same things CPLDs. Basically they are big blocks of generic logic gates you can configure through downoadable software. You write a hardware description in VHDL or Verilog and compile it, then download it to your target device and Presto! ...your blank critter suddenly becomes an ASIC (well, pretty close). Make a mistake? ...just reconfigure your chip! I'm sure your school should have some Xilinx or Altera evaluation / educational platforms somewhere that you can use for your project, along with the appropriate development tools. All you'll need to do is build the hardware to interface with the CPLD board. For your purposes, this is likely your best option, as the hardware costs should be minimal if the school owns the cpld targets and dev tools. Your second best option is indeed one of the DSP evaluation kits. You should ask if the school is willing to equip their labs with one or more of these kits... which can of course be used for subsequent student projects.

Good luck with it!
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