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Old 13th October 2013, 08:06 AM   #71
Zoran is offline Zoran  Serbia
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Thanks
I didnt try yet with N.C. Vref pin but I will
Vhat is the voltage on floating Vref pin?
Did You measure maybe?
.
I made some dac before 5-7 years with 16 tda1543 in parallel
And I can say that temperature is from the vital importance.
Keeping the temperature as much is essential.
as NON inductive Riv
(You can use maybe SMD one I think that they are not induvctive like MF?)
or 10x carbon in parallel to match desired value.
.
It is much better to have a reactive network after the driver-buffer.
than on the direct output on the dac chip.
.
this dac is very very good, brings some live component to the music.
I like this chip.
.
now for the output of some sh...t sound card I am using
Zanden style multiplyed notches networks for Fs=44.K
Fs, sqtr(Fs x 2Fs), 2Fs
.
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Old 13th October 2013, 08:35 AM   #72
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Quote:
Originally Posted by Zoran View Post
Thanks
I didnt try yet with N.C. Vref pin but I will
Vhat is the voltage on floating Vref pin?
Irrespective of the load and voltage on pin 6, 8 the vRef "supplies" about 2,18 volt (in practice there is a slight drift, initial 2,202 and 2,173 after 10 minutes). Probably thermal in nature.

This floating pin 7 is also the standard structure of the data sheet (where the vRef is used for the bias of the opamp)

Output pins now dump 1,2 mA instead of supplying it like when a resistance is connected to earth. That is why my bias is higher than the output DC. With floating pin 7 I did not get output unless there is a floating bias.

Quote:
Zanden-style multiplyed notches networks for Fs=44.K
Fs, sqtr(Fs x 2Fs), 2Fs
.
What does that look like? I understand it is only for NOS?
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Old 13th October 2013, 09:09 AM   #73
Zoran is offline Zoran  Serbia
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"This floating pin 7 is also the standard structure of the data sheet (where the vRef is used for the bias of the opamp)"
exactly
(Yes thermal nature)
I recommend little heat-sink even for the one chip used...
.
not only for the NOS i think?
in original idea it is 5 or more nets starting with the desired Fs and n x Fs (n=1..5 or more) I used just 2 stages and one in between because it is after the interstage trafo.
(I used ferrite beads for L element, which is NOT proper and not good, but I want to sniff it a bit...). Zanden concept idea You can find on the net in form of patent papers
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Old 13th October 2013, 09:18 AM   #74
Zoran is offline Zoran  Serbia
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Yes i think that is Vref pin is just for some ”thermal dynamic” voltage reference source
(not current)
not to supply something (like Vref resistor or so...)
it is not un-logical, when it is not in use to disconnect it...
what do You think?
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Old 13th October 2013, 09:51 AM   #75
Zoran is offline Zoran  Serbia
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.
I spot that the Voltage have phase shift after the any simple Riv conversion.
So maybe the OP amp You used should be in inverting mode of operation,
to achieve more correct phase on the output...
dont take me wrong, like criticizing Your work - it is not,
that is simple suggestion to check
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Old 13th October 2013, 11:48 AM   #76
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Quote:
Originally Posted by Zoran View Post
.
I spot that the Voltage have phase shift after the any simple Riv conversion.
So maybe the OP amp You used should be in inverting mode of operation,
to achieve more correct phase on the output...

I think you are right; but I had trouble in adjusting the gain because the bias is also amplified so I went for the quick and dirty non-inv solution.
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Old 13th October 2013, 11:53 AM   #77
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Quote:
Originally Posted by Zoran View Post
Yes i think that is Vref pin is just for some ”thermal dynamic” voltage reference source
(not current)
not to supply something (like Vref resistor or so...)
it is not un-logical, when it is not in use to disconnect it...
what do You think?
Any current from pin 7 is reflected on the output pins probably with some kind of current mirror; that is the trick that is used to have a resistor to ground with higher Vb. So having any resistor in place with a different structure might be strange.

However, thinking about it:
  • the output now takes in 1,2 mA; what would happen if the load on the Vref changes that current demand to an equilibrium, such as 0,0 mA versus a given bias?
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Old 14th October 2013, 06:35 AM   #78
Zoran is offline Zoran  Serbia
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I dont know really what would happened in that case?
maybe it is not possible because of the spacitances current leakage,
You said that it is a part of the current mirror?)
(not sure, because I am not an expert...)
.
maybe this Vref pin should be somehow isolated
with an external circuit like voltage reference
and then used next in a IV device or so for biasing etc...
.
second what would be happened if we put some AC filter on it
or little capacitance.
.
Is it some AC signal on Vref pin when dac is in the opperation?
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Old 14th October 2013, 10:36 AM   #79
DF96 is offline DF96  England
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The Vref pin has two functions:
- setting a voltage reference for the external I/V (Vref pin is an output)
- adding an offset current to the output (Vref pin is an input)

The typical opamp virtual ground I/V circuit, as shown in datasheets, uses the first Vref function.

The typical grounded resistor passive I/V, as used in many NOS circuits, usually uses the second function.
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Old 15th October 2013, 08:08 AM   #80
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DF96,
adding this knowledge with the 1,2 mA input into pin 8, then at a specific value for the resistor on pin 7 it would balance to zero current.
Just thinking; it is easy to test (but I have a backlog now ).
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