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my final pcm1704 DAC.  this time i really mean it.  really.
my final pcm1704 DAC.  this time i really mean it.  really.
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Old 2nd December 2003, 05:04 AM   #1
jwb is offline jwb  United States
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Default my final pcm1704 DAC. this time i really mean it. really.

I'm back to the DAC. I just can't seem to get enough of these little guys. They are so fun to tweak. So fun, in fact, that I wind up blowing hundreds of dollars to experiment with minor architectural changes. So it occurred to me (about a year ago, but such things must brew for a while) to make a DAC with a bunch of knobs and switches, for better hacking.

The DAC has six data inputs: two coaxial S/PDIF, two optical S/PDIF, USB, and I2S via Mini-D Ribbon (MDR) cable*. The USB input is handled by TI PCM2902 USB codec (which also has a lot of nifty features not used here). The USB codec runs from the USB bus power. Its output and the other four S/PDIF feeds run into the RXP0:5 input pins of the Crystal CS8415A. (Shoot me now, Jocko). The selection of input is controlled by the micro, an Atmel ATmega8, also used extensively throughout the rest of the system. The CS8415A uses a 5V analog supply and a 3.3V digital supply, and it operates from its PLL. It is also fed a 24.5760MHz master clock, so its rate estimator can be used. The I2S output, in master mode, is fed into a multiplexer with the external I2S feed.

Next up the chain is the Analog AD1896. This may be a slightly aging part, but "I need a 140dB DNR" and the TI part isn't looking so hot. Anyway the TI is pin compatible and could be swapped in if desired. The AD1896 runs from a 3.3V supply. It's input is a slave serial port, and its output is a master serial port. It is fed from one of several clocks, chosen by the user and logic:

1) An on-board 24.5760MHz oscillator, for 48 and 96kHz streams.
2) An on-board 22.5792MHz oscillator, for 44.1kHz streams.
3) An external clock input on BNC
4) The recovered master clock from the CS8415A
5) The master clock from the external I2S interface.

The AD1896's output serial port is the master for the remainder of the system. So we can control many parts of the system operation from here, by choosing a clock and engaging or bypassing the ASRC function. For instance, if the transport is running from the DAC's 22.5792MHz master clock and outputting a 44.1kHz stream, we could choose to use the 22.5796MHz on-board clock and bypass the ASRC. Or, we could engage the ASRC with a 2:1 upsample to 88.2kHz (the ASRC has less distortion with even conversions like 44:88 than for conversions like 44:96). A third possibility would be to operate the ASRC upsampling to 96kHz. We could even bypass the ASRC and operate from the S/PDIF recovered clock. So you can see there are many opportunities for experimentation.

After the ASRC is your basic DF1704/PCM1704U-K package. The digital filter upsamples by 8X and splits the signal into left and right. Four PCM1704U-K chips create the balanced output. An AD844 current-feedback I/V converter stage is built-in, but a header is available for adding different I/V or filter stages. This should prove to be a rich area of experimentation, as I've found myself building entire new kits just to test a different I/V topology.

Outputs will be on four XLR and four RCA jacks, giving the ability to drive four separate pieces of equipment without hassle. This will keep me from having to swap cables too much. Not much of a feature, but there it is Other connectors on the back panel will be two BNC for S/PDIF, two optical, one 26-pin MDR, two BNC for clock outputs, one BNC for clock input, and a D-shell RS-232 port for programming. It should be as impressive a back panel as Madrigal ever dreamed up.

On the front panel will be six switches to choose the input, five switches to choose the clock, and a switch to toggle the ASRC bypass, with an LED for each. Four LEDs will also indicate the incoming clock rate (32, 44.1, 48, or 96kHz). The microcontroller will store in its flash the clock and ASRC preferences for each input and sample rate pair.

The microcontroller code is already written! Drawing has commenced! I can hardly wait to get the boards. This is my last DAC. Ever! I promise!

* jackinnj has published his i2s-over-utp scheme. I could be convinced to switch to that instead of the expensive MDR.
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Old 2nd December 2003, 06:27 AM   #2
maczrool is offline maczrool
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Sounds impressive and I already have some of the more expensive parts. Keep us posted!

Any thoughts on engaging the DF1704's digital attenuator in your design?

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Old 2nd December 2003, 11:07 AM   #3
AD1865 is offline AD1865  China
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Default Use SRC4192 to replace AD1896

The spec of SRC4192 is better than AD1896.It support 192KHz without setting to slave mode,it's convenience.
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Old 2nd December 2003, 11:34 AM   #4
jean-paul is offline jean-paul  Netherlands
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jackinnj has published his i2s-over-utp scheme
I did use the Search function but I didn't find the post on this. Was this posted here ??
It's only audio. Member of the non modular PCB design committee
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Old 2nd December 2003, 04:20 PM   #5
jwb is offline jwb  United States
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My mistake, it was Brian Brown.

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