Using the AD844 as an I/V

[smms73]

Originally Posted by georgehifi

I don't use the SK120 ccs circuit for dac dc offset nulling. I use the one Abraxilito gave me below. I don't know what proplems it creates but it works fine

As I see it , the ccs (sk170) serves to bias the ad844 in class A, because the AD844 have only a 6.5 ma quiescent current (the entire chip consumes only 6.5ma), this soluction will shut down half of the ad844 input stage and creates a D.C. offset at the output so you will need a output capacitor , another limitation is also the amount of current the ccs can source to the chip.

A better solution is to source current in input pin (2) and source the same amount of current in TZ pin (5), in this way we can bias the AD844 in Class A without D.C. offset at the output, and now the power dissipation of the AD844 is the only limitation for the amount of current we can source to the chip , I think 10ma is a good choice. In this basic circuit R5 serves to trim the output d.c. offset. You can use other types of current sources. This is only for demonstration.

The way you use it (without ccs). will also work because the DAC chip you chose has low output current and dont have output current offset. Is up to you , chose the solution that please you more.

The advantage of using a all discrete soluction is that we can better tailor a soluction for our needs.

[smms73]

Forget to say that is very important to use decoupling capacitors (C2,C3) the closest possible to the chip , as always.

C1 should be enough to get rid of the high frequency trash.

[abraxalito]

C1 would get rid of the trash nicely if the GND were perfectly quiet. But what normally happens when dumping HF on to the GND - the GND becomes rather noisy because all GND connections have inductance. Putting a small resistance in series with the C can help keep the GND clean by soaking up the HF rather than merely dumping it. Something to try by listening.

[smms73]

abraxalito , what you describe is a snubber, and yes you right, is a good way of dissipate that high frequency energy. But i think that using like 100pf in parallel with the snubber you discribe is a good compromise.

A ground plane has almost no parasitic inductance, but is easier to make when one use surface mount devices.

[abraxalito]

Yes, no simple solutions to these issues - adding 100pF will move the LC resonance to a frequency much higher, perhaps there's less energy there for the LC circuit to ring from. Yes a snubber it is. I also use snubbers for decoupling, rather than pure caps - although its quite fashionable to aim for the lowest possible ESR, usually some series resistance helps to provide damping. Getting decent sound requires attention to such small details

[smms73]

using snubbers for decoupling seems a good idea , i have never thought of that, thanks for the tip.

[abraxalito]

Groundplanes in my understanding have resistive impedances rather than inductance, assuming you use them in pairs but usually that impedance is fairly high compared to the impedance we want from our power supply.

I keep a handy supply of 0805 SMT resistors from 1R to 4R7 to introduce as the R in snubbers as I almost always use ceramics (rather than electrolytics) for decoupling. Ceramics have scary-low ESRs, in contrast to small 'lytics.

[Shinja]

on AD797's datasheet, there is a description such decoupling scheme.

AD846 MAX435 MAX436 OPA660 OPA860 OPA861 may be also applicable the IVC we are discussing.

[smms73]

OPA860 may be even better for a I/V converter than AD844 as it permit us to program the quiescent current. Have to take a better look to the list that you present.

[dirkwright]

Originally Posted by smms73

abraxalito , what you describe is a snubber, and yes you right, is a good way of dissipate that high frequency energy. But i think that using like 100pf in parallel with the snubber you discribe is a good compromise.

A ground plane has almost no parasitic inductance, but is easier to make when one use surface mount devices.

I would think that the inductance added by the resistor would reduce the effectiveness of the bypass. Unless someone has actually investigated this in real life and produced some kind of evidence and data to show that there is a benefit, I'm not going to use a resistor between the bypass cap and ground. None of the data sheets or other sources I have read about bypassing have suggested this, but of course I am not extremely well read either.

Ground planes are no big deal for through hole devices in my experience. I use two, one on each side of the board.

One good design principle I learned from another source is to use a very wide trace between the IC power pin and the bypass cap.