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#31 |
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diyAudio Member
Join Date: Nov 2002
Location: Grenoble, FR
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you have to put the clock at the place at the original quartz, if your chip is recieving the clock signal from another ic, you can't simply put the KC at the 7327's input
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Just remember: in theory there's no difference between theory and practice. But in practice it usually is quite a bit difference... Bob Pease |
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#32 | |
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diyAudio Member
Join Date: Dec 2001
Location: Eindhoven
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Quote:
Hi, (Kwak) clock output normally goes to chip input (pin 16). Connect clock ground as close as possible to the SAA chip (preferably pin 14). Please note that this chip runs on 3.3V, so the clock output voltage shouldn't be higher than that. enjoy |
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#33 | |
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Banned
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#34 | |
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Banned
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#35 |
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diyAudio Member
Join Date: Jan 2004
Location: Discovery Bay, Prague, Paris...
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You could have the most perfect clock on the transport section (primary side of ASRC), however if the clock operating the secondary side of an ASRC which also operates the DAC is poorer then the primary side, the benefit of the better transport clock is significantly degraded.
The phase noise performance of an ASRC can never be better then the Secondary side Master clock. Put your best clock on the secondary side – then improve the primary side clock. I find it frustrating, the some people cannot understand that in an ASRC system the DAC is ultimately Clock by the secondary side clock and the SRC will offer no attenuation to this clocks phase noise. Notice I used the word “attenuation” – meaning the level of phase noise on the primary side is still important – but if you have a choice, add your second best clock here - its Phase noise will be ATTENUATED by the ASRC – so long as the ASRC secondary side clock is of LOWER PHASE NOISE. In a typical system, the primary side clock (the transport clock) will be implemented as a part of the CD servo decoder i.e. form part of the crystal oscillator “block” on the CD decoder IC. Due to the very poor short term phase noise performance of these integral oscillator circuits – improving this clock will bring large benefits. As most modern DAC’s and ASRC don’t have onboard crystal circuits (for good reason), they necessitate the use of a “off chip” clock circuit, and thus the secondary side clock will normally be of inherently higher quality. So once again, best clock on ASRC Secondary side, second best clock on primary side of ASRC where it will gain the benefit of the SRC jitter attenuation. Elso my hat off to you if that’s your Wife / Girlfriend in your avatar! Regards, John
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Life shouldn’t be take it too seriously, you will not come out alive anyway… |
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#36 | |
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Banned
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John, beauty is only in the eyes of the beholder....
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#37 |
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diyAudio Member
Join Date: Oct 2003
Location: The Lab
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Elso: That's the nicest thing i have heard you say
![]() btw: my avatar was found on www.bride.ru And of course it is my wife / girlfriend ![]() (soon ... )
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www.newclassd.com |
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#38 | |
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Banned
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http://www.dailybruin.ucla.edu/db/is...ws.beauty.html http://news.bbc.co.uk/2/hi/africa/3561878.stm http://www.fullhyd.com/discussions/v...=39085&start=0 |
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#39 | |
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Banned
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On second thought you better find salvation here: http://www.subgenius.com/?
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