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Old 4th September 2012, 09:18 PM   #171
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Well, the other circuit I developed that has the current mirrors is still better in terms of low noise compared to these circuits I'm playing with that use chips. The distortion may not be as low, but I think it's probably low enough. I've tried all kinds of variations on these chip circuits and did not come up with anything really good.
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Old 26th November 2012, 05:37 PM   #172
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Quote:
Originally Posted by smms73 View Post
I think that with the buffers we can have both low distortion and low noise.
what you guys think? and what is your experience.
I think the BUF634 is good enough, and easy enough to use, but if one wanted to go "whole hog", then an SMD implementation with the LME49990 + LME49600 would be the way to go for each "super op amp". I'm going with something much easier though; the LME49710 + BUF634 in 8 pin dip form and through hole devices.
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Old 29th November 2012, 10:10 AM   #173
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Dear All,

Very nice and informative thread.

Once again the NE5534 shows up. And those who mentioned to use pin5 and feed a buffer with that are very right! That is the way to go, and one of the best NE5534's secrets.

The NE5534 is often cursed as the "bad" Op Amp. However I would like to show you some some simulations in Tina, How the NE5534 actually deals better with glitches and fast pulses then more expensive types.

You can try two approaches. 1, To avoid/filter out the fast rising glitches of the DAC completely. Or 2, Let the I-V converter follow those steps as accurate as possible. (Or of course a combination of both)

See the simulations below. The current generator is set on a 1nS, 3,9mA PP Pulse.

IV TEST1: Shows the NE5534 with 100p miller compensation. As you can see it follows the pulse very accurate.

IV TEST2: Shows the OPA627 with feedback compensation and without. With compensation we can filter out the glitch to round 50mV at it's peak.

IV TEST3: Shows the AD797 with feedback compensation and without. With compensation we can filter out the glitch to round 60mV at it's peak.

Pick your poison....

Of course this are just simulations with many variables and errors possible. But based on that alone I would prefer the NE5534 as I-V convertor. TI isn't so silly after all for explicit choosing this Op Amp for IV duties in their high-end DAC.

Secondly, unlike most Op Amps, the NE5534 is designed to drive impedances as low as 600 Ohms. So even without buffer, it would be able to deal better with the low impedance input from the following lowpass filter/instrumentation amplifier. I think this is another reason why TI picked to NE5534 on this occasion.

One question for those who work with Tina. Why is it that when I set the current source value on e.g. 7.8mA PP that I don't get a differential 7.8ma PP? I should get 3.9mA PP in opposite phase on each leg of the current source.... But I don't. I get 7.8mA PP on each leg.

With kind regards,
Bas
Attached Images
File Type: jpg DAC-IV1 TEST1.JPG (51.2 KB, 234 views)
File Type: jpg DAC IV1 TEST2.JPG (112.0 KB, 233 views)
File Type: jpg DAC IV1 TEST3.JPG (112.2 KB, 228 views)

Last edited by Sebastiaan; 29th November 2012 at 10:16 AM.
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Old 29th November 2012, 10:40 AM   #174
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Hi Bas,

Quote:
Originally Posted by Sebastiaan View Post
IV TEST1: Shows the NE5534 with 100p miller compensation. As you can see it follows the pulse very accurate.
What model are you using? Macromodel or transistor level or something in between? Your plot for the 5534 simulation shows a 200mV step in well under 1nS - that's a slew rate of >1V/5nS or better than 200V/uS. How can this come out of an overcompensated 5534 which only gets 13V/uS with no comp cap?

Quote:
Of course this are just simulations with many variables and errors possible. But based on that alone I would prefer the NE5534 as I-V convertor. TI isn't so silly after all for explicit choosing this Op Amp for IV duties in their high-end DAC.
Curious how TI's application doesn't look much like your schematic - from what I recall they have something like 2n2 across the feedback resistor, no 100pF comp cap.
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Old 29th November 2012, 12:19 PM   #175
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Hi Abraxalito,

Good to hear from you! I hope everything is okay your side. My sincere apologies our contact got cut off. I have bin sick for a long time. However I am active again as you can see

This is the Macro model I used in Tina. Me too think it is an error in the model. However Consistently I get amazing results with the NE5534 in simulations.

This is the Macro:

*
* NE5534/301 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.01 ON 04/10/89 AT 12:41
* (REV N/A) SUPPLY VOLTAGE: +/-15V
* CONNECTIONS: NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OUTPUT
* | | | | | COMPENSATION
* | | | | | / \
.SUBCKT NE5534/301 1 2 3 4 5 6 7
*
C1 11 12 7.703E-12
DC 5 53 DX
DE 54 5 DX
DLP 90 91 DX
DLN 92 90 DX
DP 4 3 DX
EGND 99 0 POLY(2) (3,0) (4,0) 0 .5 .5
FB 7 99 POLY(5) VB VC VE VLP VLN 0 2.893E6 -3E6 3E6 3E6 -3E6
GA 6 0 11 12 1.382E-3
GCM 0 6 10 99 13.82E-9
IEE 10 4 DC 133.0E-6
HLIM 90 0 VLIM 1K
Q1 11 2 13 QX
Q2 12 1 14 QX
R2 6 9 100.0E3
RC1 3 11 723.3
RC2 3 12 723.3
RE1 13 10 329
RE2 14 10 329
REE 10 99 1.504E6
RO1 8 5 50
RO2 7 99 25
RP 3 4 7.757E3
VB 9 0 DC 0
VC 3 53 DC 2.700
VE 54 4 DC 2.700
VLIM 7 8 DC 0
VLP 91 0 DC 38
VLN 0 92 DC 38
.MODEL DX D(IS=800.0E-18)
.MODEL QX NPN(IS=800.0E-18 BF=132)
.ENDS

With kind regards,
Bas


Quote:
Originally Posted by abraxalito View Post
Hi Bas,



What model are you using? Macromodel or transistor level or something in between? Your plot for the 5534 simulation shows a 200mV step in well under 1nS - that's a slew rate of >1V/5nS or better than 200V/uS. How can this come out of an overcompensated 5534 which only gets 13V/uS with no comp cap?



Curious how TI's application doesn't look much like your schematic - from what I recall they have something like 2n2 across the feedback resistor, no 100pF comp cap.
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Old 29th November 2012, 12:57 PM   #176
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I think there's something wrong with the spice model of the NE5534 in Tina because the first circuit doesn't perform very well at all whereas the second one is outstanding. I see from the schematic of the actual chip that it does make sense to take the output from pin 5, but the spice model appears to be different.
Attached Images
File Type: jpg NE5534 + buffer IV V1.1.JPG (47.6 KB, 195 views)
File Type: jpg NE5534 + buffer IV V1.2.JPG (38.6 KB, 184 views)
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Old 29th November 2012, 01:48 PM   #177
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Quote:
Originally Posted by dirkwright View Post
I think there's something wrong with the spice model of the NE5534 in Tina because the first circuit doesn't perform very well at all whereas the second one is outstanding. I see from the schematic of the actual chip that it does make sense to take the output from pin 5, but the spice model appears to be different.
Dear dirkwright,

There is an error in the spice model of the NE5534. Pin 5 out is pin 8 in the spice model. Then it works

So with other words, if you connect pin 8 to the buffer (instead of the actual output) then it works.
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Old 29th November 2012, 01:53 PM   #178
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Quote:
Originally Posted by dirkwright View Post
I think there's something wrong with the spice model of the NE5534 in Tina because the first circuit doesn't perform very well at all whereas the second one is outstanding. I see from the schematic of the actual chip that it does make sense to take the output from pin 5, but the spice model appears to be different.
Like this:
Attached Images
File Type: jpg DAC-IV1 + buffer.JPG (23.9 KB, 92 views)
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Old 29th November 2012, 01:55 PM   #179
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Quote:
Originally Posted by Sebastiaan View Post
Good to hear from you! I hope everything is okay your side. My sincere apologies our contact got cut off. I have bin sick for a long time. However I am active again as you can see
Indeed its a pleasure to see you back and I hope your health has fully recovered now Everything's going swimmingly over on my side, getting some very pleasing sounds out of my latest DAC incarnation.

I looked at your listing but its too impenetrable to me. My ability to read Spice netlists is poor. It looks like a kind of hybrid model with some transistors but certainly a long way from the full complement of the chip. Perhaps you could develop your own based on the very helpful paper by Alexander and Bowers. If you can't find it I could get the link for you. I could also send you my model for the LM1876 based on their template which wouldn't be too difficult to modify to the NE5534. There is one thing about the 5534 though which requires a bit of attention - there's some lead-lag compensation going on, shown by a kink in the phase curve.
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Old 29th November 2012, 02:18 PM   #180
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Quote:
Originally Posted by Sebastiaan View Post
Like this:
OK, but performance is not better as far as I can see. Thanks for the tip though.
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