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Old 15th November 2012, 01:46 PM   #651
zinsula is offline zinsula  Switzerland
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Quote:
Originally Posted by Joachim Gerhard View Post
Our design is a driven, floating cascode, your design is a fixed cascode, parallel symmetric.
Hmm, the left one is driven as well I would say.
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Old 15th November 2012, 01:46 PM   #652
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Yes, i would use some source resistors though.
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Old 15th November 2012, 01:57 PM   #653
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The cascode schematic on the left above, is also a driven cascode if we by driven mean that Vds is locked to the source and not to ground. The cascode I describe above I did not show yet (as it contains rather many components).

BTW,
you need to sort the J310s for Vp as otherwise the cascoded CCS will nto work, right?



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Originally Posted by Joachim Gerhard View Post
Our design is a driven, floating cascode, your design is a fixed cascode, parallel symmetric.
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Old 15th November 2012, 02:29 PM   #654
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Ugs ( off ) for J310 is between -2 and - 6,5V. If higher voltage over the output Fet is desired the J310 can be selected for highest Ugs. There are N-channel Fets with even higher Ugs. I build our buffer many times and did not select the cascode Fets. Trimming for lowest offset can be done with R29 ( post 635 ).
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Old 15th November 2012, 03:04 PM   #655
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VDS will not be Vp as I wrote but it will be Vgs as you say. In my simulations, I use a j310 with VP=-3.6V but the Ugs for it is only -2.1V and those 2.1V will be across the lower JFET's VDS.

Source resistors can be used of course and a pot, say 10R, if what I often use to se DC offset when running in open loop.

What I was referring to about the matching need, is that VP for the JFETs in the cascodd CCS cannot be the same but have different and thus have to be selected for VP.

Problem with trimming DC offset with R29 is when you change it, you not only change offset but also the CCS current and thus the current through all the 4 JFETs which in turn changes how low a load the buffer can drive.

BTW, what does R28 (also 220R) do (I usually just connect the gate to the source without any resistor)?



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Yes, i would use some source resistors though.
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Old 15th November 2012, 03:06 PM   #656
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That is against oscillation. It works mostly without.
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Old 15th November 2012, 04:16 PM   #657
smms73 is offline smms73  Portugal
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staccatiss, in the buffers that you present in post#649 the capacitors should be parallel with the zeners not with the ccs, I like the idea of using mosfets , but carefull as some mosfet have to much capacitance. the left schema is equivalent to a floating cascode , and is much better than the one from the right. I use this configuration also in some amplifiers.
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Old 15th November 2012, 04:27 PM   #658
smms73 is offline smms73  Portugal
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Quote:
Originally Posted by Joachim Gerhard View Post
In praxis our buffer works very well although the output transistor has only Vgs of the cascode transistor from drain to source.
I am sure it works very well, very good choice of jfet , especially the BF862 that has low capacitance, this buffer can be use with the tagus I/V without any problem.

Increase Vds will lower capacitance , output impedance , and improve linearity, but i predict that this will be a minor improvements as the BF862 seems to be a good choice. Well done.
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Old 15th November 2012, 04:54 PM   #659
smms73 is offline smms73  Portugal
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Quote:
Originally Posted by Shinja View Post
smms,
I realized that we need to take care the input impedance next to your circuit.
e.g. SEPP JFET buffer or voltage follower with JFET opamp have high input "resistance" ,but large capacitance.
when the capacitance varies by input signal voltage, the actual IV impedance will vary and cause distortion.
I have made some tests, the conclusion is that as long as we do not use devices with large parasitic capacitances like for example irf510 , there will be no alteration in the linearity. I recommend use floating cascode in buffer to mantain vgs constant, devices like irf510 can be use with floating cascode also.

The first image is without any buffer, second with 2sk146 third irf510 and the last bs170, the output resistence is 1K and 2,5 Vrms all the buffer dont have floating cascodes on purpose. the distortion is measure at the output of tagus.
Attached Images
File Type: png none.PNG (67.2 KB, 268 views)
File Type: png 2sk146.PNG (73.5 KB, 251 views)
File Type: png irf510.PNG (67.0 KB, 249 views)
File Type: png bs170_noncasc_16x5v_2500mv.PNG (67.9 KB, 240 views)
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Last edited by smms73; 15th November 2012 at 04:58 PM.
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Old 15th November 2012, 05:30 PM   #660
MiiB is offline MiiB  Denmark
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With the cascode and the 862Jfet the buffer will be invisible...
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