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Old 22nd August 2012, 12:59 AM   #281
Shinja is offline Shinja  Japan
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the opamp in the opamp cen? circuit is working in floating supply ,but the noninverting input is tied to GND.
so it is almost equivalent to working in grounded supply ,and inputted IV converted signal voltage.
therefore, the opamp is requied same property of ordinary IV opamp , high slewrate and short settling time.
additionally, small base current at input stage.(base bias current and current through Cob)

it may be fun to replace input stage of smms73's circuit with opamp.
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Old 22nd August 2012, 05:47 AM   #282
EUVL is offline EUVL  Europe
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> mall base current at input stage.(base bias current and current through Cob)

Hence JFET input opamp, such as OPA1641 (post #272).

> the opamp requires same property of ordinary IV opamp, high slew rate and short settling time.

I think this affects more the IV input (opamp output) voltage variations than the current conveyed.
As long as +Vin is not leaking current to Gnd, Kirchoff's law takes care of the rest at the output (R_iv).


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Old 22nd August 2012, 08:40 AM   #283
Shinja is offline Shinja  Japan
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Quote:
Hence JFET input opamp, such as OPA1641
yes I think it is good choice too.
OPA627 may be good why its input stage is bootstrapped.
Quote:
I think this affects more the IV input (opamp output) voltage variations than the current conveyed.
As long as +Vin is not leaking current to Gnd, Kirchoff's law takes care of the rest at the output (R_iv).
but the output node of DAC should be stably regulated at 0V.
the voltage will be V/I converted with the Zout of DAC and conveyed to output.
this may affect especially pcm1704(Rout is 1kΩ) and so on.
this is why I planned to include the base common amp in the feedback loop, at first.
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Old 22nd August 2012, 10:00 AM   #284
smms73 is offline smms73  Portugal
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Default TAGUS-FET

This is special for Patrick. all JFET input.

with jfet we can simplify the circuit. But i dont have sk170/sj74 spice models. Can someone post them ?

This may perform better that the cen circuit as there is no voltage variation at the JFET´s, and don´t need a battery.

I dont have much experience with jfet and i have one question, if the gate voltage get's positive the gate current increase or in this type of jfet this is not a problem?
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Old 22nd August 2012, 10:12 AM   #285
smms73 is offline smms73  Portugal
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Or this one all jfet
( the current sources can also be made of jfet if one wants to )
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Old 22nd August 2012, 10:18 AM   #286
Shinja is offline Shinja  Japan
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another plan of output stage
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Old 22nd August 2012, 10:36 AM   #287
smms73 is offline smms73  Portugal
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And this was the original circuit (or close )... very long time ago.
I was using tubes and no feedback at that time.
This was the input and voltage amplifier of a hibrid power amplifier the output was a triple with Transistors, this was not constructed.

Is a very good driver for a triode single end with that low gain valves like 2A3, 300b, 6c33c etc...

edit: the triode was the ecc88 (6dj8)
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Last edited by smms73; 22nd August 2012 at 10:38 AM.
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Old 22nd August 2012, 10:52 AM   #288
smms73 is offline smms73  Portugal
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Quote:
Originally Posted by Shinja View Post
another plan of output stage
Very clever Shinja, nice way to get rid of the CEN battery.
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Old 22nd August 2012, 11:17 AM   #289
smms73 is offline smms73  Portugal
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But your circuit dont give a constant voltage for the input stage, my output topology do a better job in lowering distortion.
I think your idea was to get rid of the battery in CEN, was not it?
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Old 22nd August 2012, 11:23 AM   #290
smms73 is offline smms73  Portugal
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I have been looking for 2sa1015/2sc1815, and toshiba goes to stop production, but there is a SMD version 2sa1162/2sc2712. it seem a good choice, thanks Joachim and Shinja.
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