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Old 23rd June 2012, 02:23 PM   #1
Itco is offline Itco  Bulgaria
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Default How to connect WM8804 and CS8412

Hi, i have SM5842 and 2xPCM58P-K.
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I wan to make SPDIF DAC with them, and for SPDIF receiver i think to use WM8804. But i am not sure how to connect WM8804 with SM5842. SM5842 support Left Justified input format. But WM8804 output format is "Left Justified with flags". What mean this "flags", and is this format will work proper? I'll appreciate any help to solve that problem.

Last edited by Itco; 23rd June 2012 at 02:42 PM.
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Old 23rd June 2012, 07:23 PM   #2
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SM supports LJ and RJ, check page 17 of http://www.dddac.de/files/SM5842.pdf
It has "TTL compatible" inputs/outputs, but their trip voltage is somehow high at 2.5v. WM may work here.

The "flags" thing shouldn't puzzle you, as SM will ignore everything that comes after LSB.
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Old 24th June 2012, 10:29 AM   #3
Itco is offline Itco  Bulgaria
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Thank you very much for help. When this flags is not a problem, I'll make the schematic and configure pins of SM5842 to accept LJ. After that I'll post the schematic to take a look, is it correct.
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Old 24th June 2012, 03:17 PM   #4
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Now I look the page 3 http://www.dddac.de/files/SM5842.pdf. If I understand correct, to accept left justified format I must have to make INF1N HIGH and DI/INF2N LOW, the input data being now IW1N/DIL and IW2N/DIR. Is it right this pin configuration? I am not sure is it Left Justified format=LR alternating, leading data?
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Old 24th June 2012, 04:43 PM   #5
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You are right,

Page 17, fig. 5 on SM's DS shows us the signal timings.
The data is close to the left, and comes simultaneously with LRCLK = LJ.

I2S format would be the same, but with data channel delayed by 1bclk after the lrclk change.

WM's datasheet shows the same timings at page 48, fig. 23.
http://www.qobuz.com/info/IMG/pdf/wm8804.pdf

It appears the SM needs it's DIR/DIL pins connected together to properly load channel interleaved LJ, as it takes L_CH from DIL and R_CH from DIR.
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Old 25th June 2012, 05:48 PM   #6
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Thank you for explanation. I made the schematic, and configure the SM5842. Can you take a look, for errors in my schematic.

I'm little confused. On page 3, the table of pin 4. "LR alternating, leading data" is configured with INF1N-HIGH and DI/INF2N-LOW. But the figure5 on page 17 says that INF1N=INF2N=HIGH?
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Last edited by Itco; 25th June 2012 at 05:53 PM.
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