How to calculate fs bit clock knowing crystal frequency?
How to calculate fs bit clock knowing crystal frequency?

According to the data sheet for the WM8741, the crystal frequency is fs.
fs/divide ratio (32, 64, 128, 256, etc) gives the data rate. eg. 24.576ZMHz clock /256(divide ratio) = 192KHz data rate. I suspect it is dependent on the DAC. What device are you using? 
My device have a clock of 16.9344MHz, wich fs have?

The bitclock (BCLK) frequency can be calculated as follows below.
1. If the left and right channel data are in multiplexed serial format (such as they typically are before entering an oversampling interpolator) then: BLCK = original input sample rate (Fs) * the oversampling ratio * 64 bits per frame. 2. If the left and right channel data are in demultiplexed parallel format (such as they typically are after exiting an oversampling interpolator), then: BCLK = the original input sample rate (Fs) * the oversampling ratio * 32 bits per frame. For points in the DAC where oversampling has not been applied, the oversampling ratio in the above formulas = 1. Note: There also is a rarely utilized demultiplexed parallel 16 bits per frame I2S data format. 
Still don't know how to calculate?

Anybody can help me?

What is your crystal frequency?
What DAC or part are you using? What sample frequency (44.1K, 48K, etc)? 
Quote:
DAC TP Buffalo III Transport CEC TL1 uses CD red book 44.1KHz 
How are you connecting the dac to the transport I2S (presumably) or spdif? I think you need to provide some information on the transport chip set as well.

It is implementation dependent. You could guess that it is 256fs
44.1x256=11.2896MHz 11.2896*3=33.8688MHz 33.8688MHz/2=16.9344MHz In this case the clock goes through some logic to be multiplied by 2 and then divided by 3 to arrive at 256fs. So it depends what kind of multiplication and division the clock goes through 
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